[Mlir-commits] [mlir] [mlir] Migrate AMDGPU/ROCDL to targets, not chipset versions (PR #223563)

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git-clang-format --diff origin/main HEAD --extensions h,cpp -- mlir/include/mlir/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.h mlir/include/mlir/Conversion/ArithToAMDGPU/ArithToAMDGPU.h mlir/include/mlir/Conversion/GPUToROCDL/GPUToROCDLPass.h mlir/include/mlir/Conversion/MathToROCDL/MathToROCDL.h mlir/include/mlir/Dialect/AMDGPU/Transforms/Passes.h mlir/include/mlir/Dialect/AMDGPU/Utils/Chipset.h mlir/include/mlir/Dialect/GPU/Pipelines/Passes.h mlir/include/mlir/Dialect/GPU/Transforms/Passes.h mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp mlir/lib/Conversion/ArithToAMDGPU/ArithToAMDGPU.cpp mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp mlir/lib/Conversion/MathToROCDL/MathToROCDL.cpp mlir/lib/Dialect/AMDGPU/Transforms/EmulateAtomics.cpp mlir/lib/Dialect/GPU/Pipelines/GPUToROCDLPipeline.cpp mlir/lib/Dialect/GPU/TransformOps/GPUTransformOps.cpp mlir/lib/Dialect/GPU/Transforms/PromoteShuffleToAMDGPU.cpp mlir/lib/Dialect/GPU/Transforms/ROCDLAttachTarget.cpp mlir/lib/Dialect/GPU/Transforms/SubgroupReduceLowering.cpp mlir/test/lib/Dialect/GPU/TestGpuRewrite.cpp mlir/unittests/Dialect/AMDGPU/AMDGPUUtilsTest.cpp --diff_from_common_commit
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``````````diff
diff --git a/mlir/include/mlir/Dialect/AMDGPU/Utils/Chipset.h b/mlir/include/mlir/Dialect/AMDGPU/Utils/Chipset.h
index 1a964c27a..62ecd1675 100644
--- a/mlir/include/mlir/Dialect/AMDGPU/Utils/Chipset.h
+++ b/mlir/include/mlir/Dialect/AMDGPU/Utils/Chipset.h
@@ -13,7 +13,6 @@
 #include <tuple>
 
 namespace mlir::amdgpu {
-
 /// Represents the amdgpu gfx chipset version, e.g., gfx90a, gfx942, gfx1103.
 /// Note that the leading digits form a decimal number, while the last two
 /// digits form a hexadecimal number. For example:
diff --git a/mlir/lib/Conversion/ArithToAMDGPU/ArithToAMDGPU.cpp b/mlir/lib/Conversion/ArithToAMDGPU/ArithToAMDGPU.cpp
index 3710ee9c6..1bb1cf60f 100644
--- a/mlir/lib/Conversion/ArithToAMDGPU/ArithToAMDGPU.cpp
+++ b/mlir/lib/Conversion/ArithToAMDGPU/ArithToAMDGPU.cpp
@@ -32,7 +32,6 @@ using namespace mlir;
 using namespace mlir::amdgpu;
 
 namespace {
-
 struct ArithToAMDGPUConversionPass final
     : impl::ArithToAMDGPUConversionPassBase<ArithToAMDGPUConversionPass> {
   using impl::ArithToAMDGPUConversionPassBase<
@@ -90,7 +89,6 @@ struct ScalingTruncFRewritePattern final
   LogicalResult matchAndRewrite(arith::ScalingTruncFOp op,
                                 PatternRewriter &rewriter) const override;
 };
-
 } // end namespace
 
 static bool isSupportedF8(Type elementType, const ROCDL::TargetInfo &target) {
diff --git a/mlir/lib/Dialect/GPU/Transforms/PromoteShuffleToAMDGPU.cpp b/mlir/lib/Dialect/GPU/Transforms/PromoteShuffleToAMDGPU.cpp
index 8fb62258c..b17b21c27 100644
--- a/mlir/lib/Dialect/GPU/Transforms/PromoteShuffleToAMDGPU.cpp
+++ b/mlir/lib/Dialect/GPU/Transforms/PromoteShuffleToAMDGPU.cpp
@@ -23,7 +23,6 @@
 using namespace mlir;
 
 namespace {
-
 /// Try to promote `gpu.shuffle` to `amdgpu.swizzle_bitmode`, width must be 64
 /// and offset must be a constant integer in the range [0, 31].
 struct PromoteShuffleToSwizzlePattern

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https://github.com/llvm/llvm-project/pull/223563