[Mlir-commits] [mlir] 5b46a5d - [mlir][SPIR-V] Verify memory semantics for AtomicLoad/Store/Exchange/CompareExchange ops (#212990)

[llvmlistbot at llvm.org]

Author: Arseniy Obolenskiy
Date: 2026-10-01T12:34:05+02:00
New Revision: 5b46a5d578269aca9e1f74b79f23bddc7af9a2b5

URL: https://github.com/llvm/llvm-project/commit/5b46a5d578269aca9e1f74b79f23bddc7af9a2b5
DIFF: https://github.com/llvm/llvm-project/commit/5b46a5d578269aca9e1f74b79f23bddc7af9a2b5.diff

LOG: [mlir][SPIR-V] Verify memory semantics for AtomicLoad/Store/Exchange/CompareExchange ops (#212990)

Added: 
    

Modified: 
    mlir/include/mlir/Dialect/SPIRV/IR/SPIRVAtomicOps.td
    mlir/lib/Dialect/SPIRV/IR/AtomicOps.cpp
    mlir/test/Dialect/SPIRV/IR/atomic-ops.mlir

Removed: 
    


################################################################################
diff  --git a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVAtomicOps.td b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVAtomicOps.td
index d756a923b744f..c706e39c4eb0c 100644
--- a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVAtomicOps.td
+++ b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVAtomicOps.td
@@ -172,7 +172,6 @@ def SPIRV_AtomicCompareExchangeOp : SPIRV_Op<"AtomicCompareExchange", [
   }];
 
   let hasCustomAssemblyFormat = 0;
-  let hasVerifier = 0;
 }
 
 // -----
@@ -226,7 +225,6 @@ def SPIRV_AtomicCompareExchangeWeakOp : SPIRV_Op<"AtomicCompareExchangeWeak", [
   }];
 
   let hasCustomAssemblyFormat = 0;
-  let hasVerifier = 0;
 }
 
 // -----
@@ -272,7 +270,6 @@ def SPIRV_AtomicLoadOp : SPIRV_Op<"AtomicLoad", [
   }];
 
   let hasCustomAssemblyFormat = 0;
-  let hasVerifier = 0;
 }
 
 // -----
@@ -315,7 +312,6 @@ def SPIRV_AtomicStoreOp : SPIRV_Op<"AtomicStore", [
   }];
 
   let hasCustomAssemblyFormat = 0;
-  let hasVerifier = 0;
 }
 
 // -----
@@ -371,7 +367,6 @@ def SPIRV_AtomicExchangeOp : SPIRV_Op<"AtomicExchange", [
   }];
 
   let hasCustomAssemblyFormat = 0;
-  let hasVerifier = 0;
 }
 
 // -----

diff  --git a/mlir/lib/Dialect/SPIRV/IR/AtomicOps.cpp b/mlir/lib/Dialect/SPIRV/IR/AtomicOps.cpp
index a7600833c3a2d..21a7e1dd99fe6 100644
--- a/mlir/lib/Dialect/SPIRV/IR/AtomicOps.cpp
+++ b/mlir/lib/Dialect/SPIRV/IR/AtomicOps.cpp
@@ -57,6 +57,50 @@ LogicalResult AtomicAndOp::verify() {
   return verifyAtomicUpdateOp<AtomicAndOp, IntegerType>(getOperation());
 }
 
+//===----------------------------------------------------------------------===//
+// spirv.AtomicCompareExchangeOp
+//===----------------------------------------------------------------------===//
+
+LogicalResult AtomicCompareExchangeOp::verify() {
+  if (failed(verifyMemorySemantics(getOperation(), getEqualSemantics())))
+    return failure();
+  return verifyMemorySemantics(getOperation(), getUnequalSemantics());
+}
+
+//===----------------------------------------------------------------------===//
+// spirv.AtomicCompareExchangeWeakOp
+//===----------------------------------------------------------------------===//
+
+LogicalResult AtomicCompareExchangeWeakOp::verify() {
+  if (failed(verifyMemorySemantics(getOperation(), getEqualSemantics())))
+    return failure();
+  return verifyMemorySemantics(getOperation(), getUnequalSemantics());
+}
+
+//===----------------------------------------------------------------------===//
+// spirv.AtomicExchangeOp
+//===----------------------------------------------------------------------===//
+
+LogicalResult AtomicExchangeOp::verify() {
+  return verifyMemorySemantics(getOperation(), getSemantics());
+}
+
+//===----------------------------------------------------------------------===//
+// spirv.AtomicLoadOp
+//===----------------------------------------------------------------------===//
+
+LogicalResult AtomicLoadOp::verify() {
+  return verifyMemorySemantics(getOperation(), getSemantics());
+}
+
+//===----------------------------------------------------------------------===//
+// spirv.AtomicStoreOp
+//===----------------------------------------------------------------------===//
+
+LogicalResult AtomicStoreOp::verify() {
+  return verifyMemorySemantics(getOperation(), getSemantics());
+}
+
 //===----------------------------------------------------------------------===//
 // spirv.AtomicIAddOp
 //===----------------------------------------------------------------------===//

diff  --git a/mlir/test/Dialect/SPIRV/IR/atomic-ops.mlir b/mlir/test/Dialect/SPIRV/IR/atomic-ops.mlir
index feaa9123fd715..8fb91617aa2fe 100644
--- a/mlir/test/Dialect/SPIRV/IR/atomic-ops.mlir
+++ b/mlir/test/Dialect/SPIRV/IR/atomic-ops.mlir
@@ -73,6 +73,22 @@ func.func @atomic_compare_exchange(%ptr: !spirv.ptr<i64, Workgroup>, %value: i32
 
 // -----
 
+func.func @atomic_compare_exchange(%ptr: !spirv.ptr<i32, Workgroup>, %value: i32, %comparator: i32) -> i32 {
+  // expected-error @+1 {{expected at most one of these four memory constraints to be set: `Acquire`, `Release`,`AcquireRelease` or `SequentiallyConsistent`}}
+  %0 = spirv.AtomicCompareExchange <Workgroup> <Acquire|Release> <None> %ptr, %value, %comparator: !spirv.ptr<i32, Workgroup>
+  return %0: i32
+}
+
+// -----
+
+func.func @atomic_compare_exchange_unequal(%ptr: !spirv.ptr<i32, Workgroup>, %value: i32, %comparator: i32) -> i32 {
+  // expected-error @+1 {{expected at most one of these four memory constraints to be set: `Acquire`, `Release`,`AcquireRelease` or `SequentiallyConsistent`}}
+  %0 = spirv.AtomicCompareExchange <Workgroup> <None> <Acquire|Release> %ptr, %value, %comparator: !spirv.ptr<i32, Workgroup>
+  return %0: i32
+}
+
+// -----
+
 //===----------------------------------------------------------------------===//
 // spirv.AtomicCompareExchangeWeak
 //===----------------------------------------------------------------------===//
@@ -109,6 +125,22 @@ func.func @atomic_compare_exchange_weak(%ptr: !spirv.ptr<i64, Workgroup>, %value
 
 // -----
 
+func.func @atomic_compare_exchange_weak(%ptr: !spirv.ptr<i32, Workgroup>, %value: i32, %comparator: i32) -> i32 {
+  // expected-error @+1 {{expected at most one of these four memory constraints to be set: `Acquire`, `Release`,`AcquireRelease` or `SequentiallyConsistent`}}
+  %0 = spirv.AtomicCompareExchangeWeak <Workgroup> <Acquire|Release> <None> %ptr, %value, %comparator: !spirv.ptr<i32, Workgroup>
+  return %0: i32
+}
+
+// -----
+
+func.func @atomic_compare_exchange_weak_unequal(%ptr: !spirv.ptr<i32, Workgroup>, %value: i32, %comparator: i32) -> i32 {
+  // expected-error @+1 {{expected at most one of these four memory constraints to be set: `Acquire`, `Release`,`AcquireRelease` or `SequentiallyConsistent`}}
+  %0 = spirv.AtomicCompareExchangeWeak <Workgroup> <None> <Acquire|Release> %ptr, %value, %comparator: !spirv.ptr<i32, Workgroup>
+  return %0: i32
+}
+
+// -----
+
 //===----------------------------------------------------------------------===//
 // spirv.AtomicExchange
 //===----------------------------------------------------------------------===//
@@ -153,6 +185,14 @@ func.func @atomic_exchange(%ptr: !spirv.ptr<i64, Workgroup>, %value: i32) -> i32
 
 // -----
 
+func.func @atomic_exchange(%ptr: !spirv.ptr<i32, Workgroup>, %value: i32) -> i32 {
+  // expected-error @+1 {{expected at most one of these four memory constraints to be set: `Acquire`, `Release`,`AcquireRelease` or `SequentiallyConsistent`}}
+  %0 = spirv.AtomicExchange <Workgroup> <Acquire|Release> %ptr, %value: !spirv.ptr<i32, Workgroup>
+  return %0: i32
+}
+
+// -----
+
 //===----------------------------------------------------------------------===//
 // spirv.AtomicIAdd
 //===----------------------------------------------------------------------===//
@@ -223,6 +263,14 @@ func.func @atomic_load_mismatch(%ptr : !spirv.ptr<i32, Workgroup>) -> i64 {
 
 // -----
 
+func.func @atomic_load(%ptr : !spirv.ptr<i32, Workgroup>) -> i32 {
+  // expected-error @+1 {{expected at most one of these four memory constraints to be set: `Acquire`, `Release`,`AcquireRelease` or `SequentiallyConsistent`}}
+  %0 = spirv.AtomicLoad <Workgroup> <Acquire|Release> %ptr : !spirv.ptr<i32, Workgroup>
+  return %0 : i32
+}
+
+// -----
+
 //===----------------------------------------------------------------------===//
 // spirv.AtomicOr
 //===----------------------------------------------------------------------===//
@@ -283,6 +331,14 @@ func.func @atomic_store_mismatch(%ptr : !spirv.ptr<i32, Workgroup>, %value : i64
 
 // -----
 
+func.func @atomic_store(%ptr : !spirv.ptr<i32, Workgroup>, %value : i32) {
+  // expected-error @+1 {{expected at most one of these four memory constraints to be set: `Acquire`, `Release`,`AcquireRelease` or `SequentiallyConsistent`}}
+  spirv.AtomicStore <Workgroup> <Acquire|Release> %ptr, %value : !spirv.ptr<i32, Workgroup>
+  return
+}
+
+// -----
+
 //===----------------------------------------------------------------------===//
 // spirv.AtomicUMax
 //===----------------------------------------------------------------------===//