[Mlir-commits] [mlir] [mlir][acc] Return after NYI for non-NVIDIA per-row barrier (PR #238116)
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llvmlistbot at llvm.org
Mon Nov 2 13:49:50 PST 2026
llvmorg-github-actions[bot] wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-mlir
Author: Scott Manley (rscottmanley)
<details>
<summary>Changes</summary>
createPerRowBarrier reports that a per-row barrier is not yet implemented on non-NVIDIA devices, but it does not return afterwards. Execution falls through to the NVVM named-barrier code, which asserts that the device type is NVIDIA, so acc-cg-to-gpu aborts instead of failing cleanly. This is reachable with the default device type for any thread-partitioned loop wider than a subgroup. For example, acc-cg-to-gpu-barrier-after-thread-loop.mlir crashes if its device-type=nvidia option is removed.
Return after emitting the diagnostic, matching the other NYI sites in this file, and add a test that checks the diagnostic for this case.
---
Full diff: https://github.com/llvm/llvm-project/pull/238116.diff
2 Files Affected:
- (modified) mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp (+1)
- (added) mlir/test/Dialect/OpenACC/acc-cg-to-gpu-per-row-barrier-unsupported.mlir (+35)
``````````diff
diff --git a/mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp b/mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
index 0038de3831f562..e5a280f7a9a7f9 100644
--- a/mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
+++ b/mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
@@ -1865,6 +1865,7 @@ void ACCCGToGPULowering::createPerRowBarrier(Location loc) {
(void)accSupport.emitNYI(
loc,
"per-row barrier to support worker parallelism on non-NVIDIA device");
+ return;
}
// Per-row barrier with fully runtime branching.
diff --git a/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-per-row-barrier-unsupported.mlir b/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-per-row-barrier-unsupported.mlir
new file mode 100644
index 00000000000000..27f1572ab951f6
--- /dev/null
+++ b/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-per-row-barrier-unsupported.mlir
@@ -0,0 +1,35 @@
+// RUN: mlir-opt %s --pass-pipeline="builtin.module(func.func(acc-cg-to-gpu))" -verify-diagnostics
+
+// A row wider than a subgroup is synchronized with an NVVM named barrier,
+// which has no portable equivalent. The pass runs here with the default
+// device type rather than nvidia, so the per-row barrier is reported as not
+// yet implemented instead of being emitted.
+
+func.func @per_row_barrier_non_nvidia(%a: memref<128xf32>, %b: memref<128xf32>) {
+ %c1_pw = arith.constant 1 : index
+ %c128_pw = arith.constant 128 : index
+ %bx = acc.par_width %c1_pw par_dim(#acc.par_dim<block_x>)
+ %tx = acc.par_width %c128_pw par_dim(#acc.par_dim<thread_x>)
+ acc.compute_region launch(%kbx = %bx, %ktx = %tx) ins(%ma = %a, %mb = %b) : (memref<128xf32>, memref<128xf32>) {
+ %c0 = arith.constant 0 : index
+ %c1 = arith.constant 1 : index
+ %c3 = arith.constant 3 : index
+ %c4 = arith.constant 4 : index
+ %c128 = arith.constant 128 : index
+ %one = arith.constant 1.0 : f32
+ scf.parallel (%g) = (%c0) to (%kbx) step (%c1) {
+ scf.for %it = %c0 to %c4 step %c1 {
+ // expected-error @below {{not yet implemented: per-row barrier to support worker parallelism on non-NVIDIA device}}
+ scf.parallel (%i) = (%c0) to (%c128) step (%c1) {
+ memref.store %one, %ma[%i] : memref<128xf32>
+ scf.reduce
+ } {acc.par_dims = #acc<par_dims[thread_x]>}
+ %v = memref.load %ma[%c3] : memref<128xf32>
+ memref.store %v, %mb[%it] : memref<128xf32>
+ }
+ scf.reduce
+ } {acc.par_dims = #acc<par_dims[block_x]>}
+ acc.yield
+ } <{origin = "acc.kernels"}>
+ return
+}
``````````
</details>
https://github.com/llvm/llvm-project/pull/238116
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