[Mlir-commits] [mlir] 5c3a1fe - [mlir][SPIR-V] Add SPIRVToLLVM conversion for CL clamp ops (#237747)

llvmlistbot at llvm.org llvmlistbot at llvm.org
Mon Nov 2 01:37:55 PST 2026


Author: Arseniy Obolenskiy
Date: 2026-11-02T10:37:47+01:00
New Revision: 5c3a1feca323d6bdfb1107686c69c40a78d58ba1

URL: https://github.com/llvm/llvm-project/commit/5c3a1feca323d6bdfb1107686c69c40a78d58ba1
DIFF: https://github.com/llvm/llvm-project/commit/5c3a1feca323d6bdfb1107686c69c40a78d58ba1.diff

LOG: [mlir][SPIR-V] Add SPIRVToLLVM conversion for CL clamp ops (#237747)

Added: 
    

Modified: 
    mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
    mlir/test/Conversion/SPIRVToLLVM/cl-ops-to-llvm.mlir

Removed: 
    


################################################################################
diff  --git a/mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp b/mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
index cfcc608025848..84063ac5d2b0f 100644
--- a/mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
+++ b/mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
@@ -1134,8 +1134,8 @@ class SNegatePattern : public SPIRVToLLVMConversion<spirv::SNegateOp> {
   }
 };
 
-/// Converts the GLSL clamp ops (FClamp, SClamp, UClamp) into a nested
-/// min/max sequence, following the op semantics `min(max(x, minVal), maxVal)`.
+/// Converts the GL and CL clamp ops into a nested min/max sequence, following
+/// the op semantics `min(max(x, minVal), maxVal)`.
 template <typename SPIRVOp, typename LLVMMinOp, typename LLVMMaxOp>
 class ClampPattern : public SPIRVToLLVMConversion<SPIRVOp> {
 public:
@@ -2523,6 +2523,9 @@ void mlir::populateSPIRVToLLVMConversionPatterns(
       DirectConversionPattern<spirv::CLSMinOp, LLVM::SMinOp>,
       DirectConversionPattern<spirv::CLUMaxOp, LLVM::UMaxOp>,
       DirectConversionPattern<spirv::CLUMinOp, LLVM::UMinOp>, CLMixPattern,
+      ClampPattern<spirv::CLFClampOp, LLVM::MinNumOp, LLVM::MaxNumOp>,
+      ClampPattern<spirv::CLSClampOp, LLVM::SMinOp, LLVM::SMaxOp>,
+      ClampPattern<spirv::CLUClampOp, LLVM::UMinOp, LLVM::UMaxOp>,
       CountZerosPattern<spirv::CLClzOp, LLVM::CountLeadingZerosOp>,
       CountZerosPattern<spirv::CLCtzOp, LLVM::CountTrailingZerosOp>,
 

diff  --git a/mlir/test/Conversion/SPIRVToLLVM/cl-ops-to-llvm.mlir b/mlir/test/Conversion/SPIRVToLLVM/cl-ops-to-llvm.mlir
index 0fc6935260ff3..f18a8f51fc6b0 100644
--- a/mlir/test/Conversion/SPIRVToLLVM/cl-ops-to-llvm.mlir
+++ b/mlir/test/Conversion/SPIRVToLLVM/cl-ops-to-llvm.mlir
@@ -113,6 +113,24 @@ spirv.func @cl_count_zeros(%arg0: i32, %arg1: vector<3xi16>) "None" {
   spirv.Return
 }
 
+//===----------------------------------------------------------------------===//
+// Clamp OpenCL ops
+//===----------------------------------------------------------------------===//
+
+// CHECK-LABEL: @cl_clamp
+spirv.func @cl_clamp(%arg0: f32, %arg1: i16, %arg2: vector<3xi32>) "None" {
+  // CHECK: %[[FMAX:.*]] = llvm.intr.maxnum(%{{.*}}, %{{.*}}) : (f32, f32) -> f32
+  // CHECK: llvm.intr.minnum(%[[FMAX]], %{{.*}}) : (f32, f32) -> f32
+  %0 = spirv.CL.fclamp %arg0, %arg0, %arg0 : f32
+  // CHECK: %[[SMAX:.*]] = llvm.intr.smax(%{{.*}}, %{{.*}}) : (i16, i16) -> i16
+  // CHECK: llvm.intr.smin(%[[SMAX]], %{{.*}}) : (i16, i16) -> i16
+  %1 = spirv.CL.s_clamp %arg1, %arg1, %arg1 : i16
+  // CHECK: %[[UMAX:.*]] = llvm.intr.umax(%{{.*}}, %{{.*}}) : (vector<3xi32>, vector<3xi32>) -> vector<3xi32>
+  // CHECK: llvm.intr.umin(%[[UMAX]], %{{.*}}) : (vector<3xi32>, vector<3xi32>) -> vector<3xi32>
+  %2 = spirv.CL.u_clamp %arg2, %arg2, %arg2 : vector<3xi32>
+  spirv.Return
+}
+
 //===----------------------------------------------------------------------===//
 // spirv.CL.mix
 //===----------------------------------------------------------------------===//


        


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