[Mlir-commits] [mlir] [MLIR][XeGPU] Fix pass name in RUN command (PR #199766)

[Nishant Patel]

https://github.com/nbpatel updated https://github.com/llvm/llvm-project/pull/199766

>From a07be671c97cae4732834b1abe4c43496da97e3f Mon Sep 17 00:00:00 2001
From: nbpatel <nishant.b.patel at intel.com>
Date: Tue, 26 May 2026 21:13:46 +0000
Subject: [PATCH] Fix Test

---
 mlir/test/Integration/Dialect/XeGPU/WG/load_store_matrix.mlir | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/mlir/test/Integration/Dialect/XeGPU/WG/load_store_matrix.mlir b/mlir/test/Integration/Dialect/XeGPU/WG/load_store_matrix.mlir
index 598991c7401c6..9b71356cce9b8 100644
--- a/mlir/test/Integration/Dialect/XeGPU/WG/load_store_matrix.mlir
+++ b/mlir/test/Integration/Dialect/XeGPU/WG/load_store_matrix.mlir
@@ -1,4 +1,4 @@
-// RUN: mlir-opt %s --pass-pipeline="builtin.module(gpu.module(xegpu-wg-to-sg-distribute, xegpu-blocking, xegpu-sg-to-wi-distribute-experimental), xevm-attach-target{chip=pvc}, gpu.module(convert-xegpu-to-xevm))" \
+// RUN: mlir-opt %s --pass-pipeline="builtin.module(gpu.module(xegpu-wg-to-sg-distribute, xegpu-blocking, xegpu-sg-to-lane-distribute), xevm-attach-target{chip=pvc}, gpu.module(convert-xegpu-to-xevm))" \
 // RUN: | FileCheck %s
 
 #layout_1d = #xegpu.layout<sg_layout = [16], sg_data = [256], inst_data = [16], lane_layout = [16], lane_data = [1]>