[Mlir-commits] [mlir] [MLIR][AMDGPU] Add permlane16.var and permlanex16.var intrinsic ops (PR #199501)

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Mon May 25 02:05:02 PDT 2026


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``````````bash
git-clang-format --diff origin/main HEAD --extensions cpp -- mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp --diff_from_common_commit
``````````

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View the diff from clang-format here.
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``````````diff
diff --git a/mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp b/mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
index 0ad28892a..48bd89b3a 100644
--- a/mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
+++ b/mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
@@ -3295,8 +3295,7 @@ struct AMDGPUPermlaneVarLowering
     : public ConvertOpToLLVMPattern<PermlaneVarOp> {
   using ConvertOpToLLVMPattern::ConvertOpToLLVMPattern;
 
-  AMDGPUPermlaneVarLowering(const LLVMTypeConverter &converter,
-                            Chipset chipset)
+  AMDGPUPermlaneVarLowering(const LLVMTypeConverter &converter, Chipset chipset)
       : ConvertOpToLLVMPattern<PermlaneVarOp>(converter), chipset(chipset) {}
   Chipset chipset;
 
@@ -3324,10 +3323,10 @@ struct AMDGPUPermlaneVarLowering
       Value res;
       if (cross)
         res = ROCDL::PermlaneX16VarOp::create(rewriter, loc, i32, v, v,
-                                               selector, fi, boundCtrl);
-      else
-        res = ROCDL::Permlane16VarOp::create(rewriter, loc, i32, v, v,
                                               selector, fi, boundCtrl);
+      else
+        res = ROCDL::Permlane16VarOp::create(rewriter, loc, i32, v, v, selector,
+                                             fi, boundCtrl);
       permuted.emplace_back(res);
     }
 
@@ -4605,8 +4604,7 @@ void mlir::populateAMDGPUToROCDLConversionPatterns(LLVMTypeConverter &converter,
            PackedStochRoundFp8OpLowering, GatherToLDSOpLowering,
            GlobalLoadAsyncToLDSOpLowering, TransposeLoadOpLowering,
            GlobalTransposeLoadOpLowering, AMDGPUPermlaneLowering,
-           AMDGPUPermlaneVarLowering,
-           AMDGPUMakeDmaBaseLowering<MakeDmaBaseOp>,
+           AMDGPUPermlaneVarLowering, AMDGPUMakeDmaBaseLowering<MakeDmaBaseOp>,
            AMDGPUMakeDmaBaseLowering<MakeGatherDmaBaseOp>,
            AMDGPULowerDescriptor<MakeDmaDescriptorOp>,
            AMDGPULowerDescriptor<MakeGatherDmaDescriptorOp>,

``````````

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https://github.com/llvm/llvm-project/pull/199501


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