[Mlir-commits] [mlir] [MLIR][NVVM] Add div Ops (PR #198744)

[Guray Ozen]

================
@@ -6579,6 +6579,62 @@ def NVVM_SqrtApproxOp : NVVM_F32UnaryApproxOp<"sqrt.approx"> {
   }];
 }
 
+//===----------------------------------------------------------------------===//
+// NVVM div op definitions
+//===----------------------------------------------------------------------===//
+
+def NVVM_DivFOp
+    : NVVM_SingleResultIntrinsicOp<"divf", [Pure, SameOperandsAndResultType]> {
+  let summary = "Divide one value by another";
+  let description = [{
+    Divides lhs by rhs, stores result in res (`res = lhs / rhs`).
+
+    For more information, see PTX ISA:
+    [div](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-div)
+  }];
+  let arguments = (ins AnyTypeOf<[F32, F64]>:$lhs, AnyTypeOf<[F32, F64]>:$rhs,
+      FPArithRoundingMode:$rnd, DefaultValuedAttr<BoolAttr, "false">:$ftz);
+  let results = (outs AnyTypeOf<[F32, F64]>:$res);
+  let assemblyFormat = "$lhs `,` $rhs attr-dict `:` type($res)";
+  let hasVerifier = 1;
+}
+
+def NVVM_DivFApproxOp
+    : NVVM_SingleResultIntrinsicOp<"divf.approx", [Pure,
+                                                   SameOperandsAndResultType]> {
+  let summary = "Fast, approximate divide";
+  let description = [{
+    Implements a fast approximation to divide, computed as `res = lhs * (1/rhs)`.
+    The maximum ulp error is 2 in the normal range.
+
+    For more information, see PTX ISA:
+    [div](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-div)
+  }];
+  let arguments = (ins F32:$lhs, F32:$rhs,
+      DefaultValuedAttr<BoolAttr, "false">:$ftz);
+  let results = (outs F32:$res);
+  let assemblyFormat = "$lhs `,` $rhs attr-dict `:` type($res)";
+}
+
+def NVVM_DivFFullOp
----------------
grypp wrote:

Can we have a single OP for div?  

https://github.com/llvm/llvm-project/pull/198744