[Mlir-commits] [mlir] [MLIR][AMDGPU] Added l2-prefetch op to AMDGPU (PR #188457)
Ravil Dorozhinskii
llvmlistbot at llvm.org
Thu Mar 26 06:02:16 PDT 2026
================
@@ -3950,6 +3950,56 @@ struct AMDGPUTensorLoadStoreOpLowering
}
};
+struct GlobalPrefetchOpLowering
+ : public ConvertOpToLLVMPattern<GlobalPrefetchOp> {
+ GlobalPrefetchOpLowering(const LLVMTypeConverter &converter, Chipset chipset)
+ : ConvertOpToLLVMPattern<GlobalPrefetchOp>(converter), chipset(chipset) {}
+
+ LogicalResult
+ matchAndRewrite(GlobalPrefetchOp op, GlobalPrefetchOpAdaptor adaptor,
+ ConversionPatternRewriter &rewriter) const override {
+ if (chipset < kGfx1250)
+ return op->emitOpError("is only supported on gfx1250+");
+
+ const TemporalHint hint = op.getTemporalHint();
+ const bool isSpeculative = op.getSpeculative();
+
+ int32_t llvmScopeValue = static_cast<int32_t>(hint);
+ if (hint == TemporalHint::RT || hint == TemporalHint::HT)
+ llvmScopeValue = isSpeculative ? llvmScopeValue : llvmScopeValue | 1;
+
+ IntegerAttr scopeAttr = rewriter.getI32IntegerAttr(llvmScopeValue);
+
+ ValueRange indices = adaptor.getIndices();
+ Value memRef = adaptor.getSrc();
+ MemRefDescriptor descriptor(memRef);
+ Location loc = op->getLoc();
+ Value offset =
+ LLVM::ConstantOp::create(rewriter, loc, rewriter.getI64Type(), 0);
+ for (auto [i, index] : llvm::enumerate(indices)) {
+ Value stride = descriptor.stride(rewriter, loc, i);
+ Value mulOp = LLVM::MulOp::create(rewriter, loc, rewriter.getI64Type(),
+ stride, index);
+ offset = LLVM::AddOp::create(rewriter, loc, rewriter.getI64Type(), offset,
+ mulOp);
+ }
+
+ Value basePtr = descriptor.alignedPtr(rewriter, loc);
+ Type elemTy = op.getSrc().getType().getElementType();
+ Type llvmElemTy = getTypeConverter()->convertType(elemTy);
+ Value prefetchPtr = LLVM::GEPOp::create(rewriter, loc, basePtr.getType(),
----------------
ravil-mobile wrote:
Done
https://github.com/llvm/llvm-project/pull/188457
More information about the Mlir-commits
mailing list