[Mlir-commits] [mlir] [mlir][NVVM] Add InferTypeOpInterface to NVVM ops with deterministic result types (PR #188173)

[Durgadoss R]

durga4github wrote:

> > Also take a look at the NVDSL examples.
> 
> The NVDSL examples use nvgpu ops (nvgpu.mbarrier_arrive, nvgpu.mbarrier_arrive_expect_tx), not NVVM ops directly. The NVGPUToNVVM lowering for these ops is already updated and tested in this PR, the nvgpu-to-nvvm.mlir conversion test and the sm_90 CUDA integration tests both pass.

Thanks for checking sm_90 integration tests! 
I agree with your reasoning and the examples may work as is. But, it would be great to get a confirmation there as well..

https://github.com/llvm/llvm-project/pull/188173