[Mlir-commits] [mlir] [mlir] Made DefaultResource the root of memory resource hierarchy. (PR #187423)

[Slava Zakharin]

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@@ -224,10 +224,18 @@ bool CSEDriver::hasOtherSideEffectingOpInBetween(Operation *fromOp,
       if (isa<MemoryEffects::Write>(effect.getEffect())) {
         // A write on a resource disjoint from all read resources cannot
         // conflict with the reads being CSE'd.
-        auto *writeResource = effect.getResource();
-        bool canConflict = llvm::any_of(readResources, [&](auto *readResource) {
-          return !writeResource->isDisjointFrom(readResource);
-        });
+        SideEffects::Resource *writeResource = effect.getResource();
+        bool canConflict =
+            llvm::any_of(readEffects, [&](const auto &readEffect) {
+              SideEffects::Resource *readResource = readEffect.getResource();
+              if (writeResource->isDisjointFrom(readResource))
+                return false;
+              // A pointer-based access to an addressable resource cannot
+              // conflict with a non-addressable resource.
+              if (readEffect.getValue() && !writeResource->isAddressable())
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vzakhari wrote:

There is a test for two disjoint non-addressable resources in [cse.mlir](https://github.com/llvm/llvm-project/pull/187423/changes/BASE..6df9077e94b308390d98043b2ac3ce5f4046b407#diff-6310c171b5233933fbb11396750fe6626d83ab858dfa5a605aeec74d8a0f933bR644). There is no conflict, because the resources are disjoint.

A test for overlapping non-addressable resources is [here](https://github.com/llvm/llvm-project/pull/187423/changes/BASE..6df9077e94b308390d98043b2ac3ce5f4046b407#diff-6310c171b5233933fbb11396750fe6626d83ab858dfa5a605aeec74d8a0f933bR628). Actually the same resource is used for the reads and the write, but the result should be the same in case they use different non-addressable resources that overlap in the hierarchy.

https://github.com/llvm/llvm-project/pull/187423