[Mlir-commits] [mlir] [MLIR][Mem2Reg] Add support for region control flow and SCF (PR #185036)

[Tobias Gysi]

gysit wrote:

> The cache became insidiously incorrect with the addition of region processing. Indeed, as regions get deleted, with particularly bad luck at heap allocation, a new region could be reallocated at the same address (typically, by an implementation of finalizePromotion), which would make the cache incorrectly hit the content of a now different region. To fix this, I made the cache follow entry block pointers instead of region pointers. Indeed, in contrast to regions which are sometimes deleted because their storage is in the Operation class, blocks are allocated directly on the heap and never deleted during the execution of the pass (and it is part of the contract of the interface, that I reformulated to expose it more clearly). With that, not only do we get this bug fixed but we also get preservation of the block index cache across region moves too!

The change makes sense. I guess the tricky part with splitting into setup and finalize is that the contract what can happen in between the two phases is quite complex. So maybe keeping the interface coupled to the pass where we have a "clear" understanding what is happening in between is a good idea, at least initially. 

https://github.com/llvm/llvm-project/pull/185036