[Mlir-commits] [mlir] [MLIR][XeGPU] Validate DPAS operand types against uArch in XeGPUToXeVM conversion (PR #185081)

[Sang Ik Lee]

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@@ -1045,22 +1045,32 @@ LogicalResult UpdateOffsetOp::verify() {
 // XeGPU_DpasOp
 //===----------------------------------------------------------------------===//
 LogicalResult DpasOp::verify() {
-  int64_t lhsRank = getLhsType().getRank();
-  int64_t rhsRank = getRhsType().getRank();
+  auto lhsType = getLhsType();
+  auto rhsType = getRhsType();
+  int64_t lhsRank = lhsType.getRank();
+  int64_t rhsRank = rhsType.getRank();
   int64_t resRank = getResultType().getRank();
-  auto lhsShape = getLhsType().getShape();
-  auto rhsShape = getRhsType().getShape();
+  auto lhsShape = lhsType.getShape();
+  auto rhsShape = rhsType.getShape();
   auto resShape = getResultType().getShape();
 
   if (getAcc() && getAcc().getType() != getResultType())
     return emitOpError("Expecting the acc type to be the same as result.");
 
+  auto lhsElemTy = lhsType.getElementType();
+  auto rhsElemTy = rhsType.getElementType();
+  if (lhsElemTy.getIntOrFloatBitWidth() >= 32 ||
+      rhsElemTy.getIntOrFloatBitWidth() >= 32) {
+    return emitOpError(
+        "Expecting lhs and rhs element types to be at most 32 bits.");
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silee2 wrote:

Isn't it `less than 32bits.` ?

https://github.com/llvm/llvm-project/pull/185081