[Mlir-commits] [mlir] [mlir][ControlFlow] Improve time complexity of RegionBranchOpInterface canonicalization patterns (PR #186114)

[Matthias Springer]

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@@ -653,12 +663,9 @@ static bool isDefinedBefore(Operation *regionBranchOp, Value a, Value b) {
 /// reachableValues(%arg0) = {%0, %1}
 /// reachableValues(%r) = {%0, %1}
 static llvm::SmallDenseSet<Value> computeReachableValuesFromSuccessorInput(
-    Value value, const RegionBranchInverseSuccessorMapping &inputToOperands) {
+    Value value, const RegionBranchInverseSuccessorMapping &inputToOperands,
+    unsigned maxReachableValues = 0) {
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matthias-springer wrote:

Let's turn this into:
```c++
static LogicalResult computeReachableValuesFromSuccessorInput(
    llvm::SmallDenseSet<Value> &result, Value value, const RegionBranchInverseSuccessorMapping &inputToOperands,
    std::optional<unsigned> maxReachableValues = std::nullopt) 
```

If there are more than `*maxReachableValues` values, return `failure`. Otherwise, return `success`.

https://github.com/llvm/llvm-project/pull/186114