[Mlir-commits] [mlir] bf208fc - [mlir][spirv] Introduce base classes for Integer and Bool elementwise binary ops (#185904)

[llvmlistbot at llvm.org]

Author: Davide Grohmann
Date: 2026-03-12T15:13:27+01:00
New Revision: bf208fc0d64a7d4cad05e327287630da008c2d77

URL: https://github.com/llvm/llvm-project/commit/bf208fc0d64a7d4cad05e327287630da008c2d77
DIFF: https://github.com/llvm/llvm-project/commit/bf208fc0d64a7d4cad05e327287630da008c2d77.diff

LOG: [mlir][spirv] Introduce base classes for Integer and Bool elementwise binary ops (#185904)

Signed-off-by: Davide Grohmann <davide.grohmann at arm.com>

Added: 
    

Modified: 
    mlir/include/mlir/Dialect/SPIRV/IR/SPIRVTosaOps.td

Removed: 
    


################################################################################
diff  --git a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVTosaOps.td b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVTosaOps.td
index 81b3dbec96184..e3d029d1d63da 100644
--- a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVTosaOps.td
+++ b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVTosaOps.td
@@ -111,6 +111,44 @@ class SPIRV_TosaElementwiseBinaryOp<string mnemonic, int opcode, list<Trait> tra
     AllElementTypesMatch<["input1", "output"]>])> {
 }
 
+class SPIRV_TosaIntegerElementwiseBinaryOp<string mnemonic, int opcode, list<Trait> traits = []> :
+  SPIRV_TosaElementwiseBinaryOp<mnemonic, opcode, traits> {
+
+  let arguments = (ins
+    SPIRV_TosaInteger_TensorArm: $input1,
+    SPIRV_TosaInteger_TensorArm: $input2
+  );
+
+  let results = (outs
+    SPIRV_TosaInteger_TensorArm: $output
+  );
+
+  let assemblyFormat = [{
+    $input1 `,`
+    $input2
+    attr-dict `:` type(operands) `->` type(results)
+  }];
+}
+
+class SPIRV_TosaBoolElementwiseBinaryOp<string mnemonic, int opcode, list<Trait> traits = []> :
+  SPIRV_TosaElementwiseBinaryOp<mnemonic, opcode, !listconcat(traits, [Pure])> {
+
+  let arguments = (ins
+    SPIRV_Bool_TensorArm: $input1,
+    SPIRV_Bool_TensorArm: $input2
+  );
+
+  let results = (outs
+    SPIRV_Bool_TensorArm: $output
+  );
+
+  let assemblyFormat = [{
+    $input1 `,`
+    $input2
+    attr-dict `:` type(operands) `->` type(results)
+  }];
+}
+
 class SPIRV_TosaConvolutionOp<string mnemonic, int opcode, list<Trait> traits = []> :
   SPIRV_TosaOpWithResult<mnemonic, opcode, !listconcat(traits, [Pure,
     TypeConstraintImplicationOn<"input", I8, "output", [I32]>,
@@ -917,7 +955,7 @@ def SPIRV_TosaArithmeticRightShiftOp : SPIRV_TosaElementwiseBinaryOp<"Arithmetic
 }
 
 
-def SPIRV_TosaBitwiseAndOp : SPIRV_TosaElementwiseBinaryOp<"BitwiseAnd", 16, [Pure]> {
+def SPIRV_TosaBitwiseAndOp : SPIRV_TosaIntegerElementwiseBinaryOp<"BitwiseAnd", 16, [Pure]> {
   let summary = "Bitwise AND operator.";
 
   let description = [{
@@ -934,25 +972,10 @@ def SPIRV_TosaBitwiseAndOp : SPIRV_TosaElementwiseBinaryOp<"BitwiseAnd", 16, [Pu
     %0 = spirv.Tosa.BitwiseAnd %arg0, %arg1 : !spirv.arm.tensor<4x1x7x12xi16>, !spirv.arm.tensor<4x13x7x12xi16> -> !spirv.arm.tensor<4x13x7x12xi16>
     ```
   }];
-
-  let arguments = (ins
-    SPIRV_TosaInteger_TensorArm: $input1,
-    SPIRV_TosaInteger_TensorArm: $input2
-  );
-
-  let results = (outs
-    SPIRV_TosaInteger_TensorArm: $output
-  );
-
-  let assemblyFormat = [{
-    $input1 `,`
-    $input2
-    attr-dict `:` type(operands) `->` type(results)
-  }];
 }
 
 
-def SPIRV_TosaBitwiseOrOp : SPIRV_TosaElementwiseBinaryOp<"BitwiseOr", 17, [Pure]> {
+def SPIRV_TosaBitwiseOrOp : SPIRV_TosaIntegerElementwiseBinaryOp<"BitwiseOr", 17, [Pure]> {
   let summary = "Bitwise OR operator.";
 
   let description = [{
@@ -969,25 +992,10 @@ def SPIRV_TosaBitwiseOrOp : SPIRV_TosaElementwiseBinaryOp<"BitwiseOr", 17, [Pure
     %0 = spirv.Tosa.BitwiseOr %arg0, %arg1 : !spirv.arm.tensor<11x30x23xi32>, !spirv.arm.tensor<1x30x23xi32> -> !spirv.arm.tensor<11x30x23xi32>
     ```
   }];
-
-  let arguments = (ins
-    SPIRV_TosaInteger_TensorArm: $input1,
-    SPIRV_TosaInteger_TensorArm: $input2
-  );
-
-  let results = (outs
-    SPIRV_TosaInteger_TensorArm: $output
-  );
-
-  let assemblyFormat = [{
-    $input1 `,`
-    $input2
-    attr-dict `:` type(operands) `->` type(results)
-  }];
 }
 
 
-def SPIRV_TosaBitwiseXorOp : SPIRV_TosaElementwiseBinaryOp<"BitwiseXor", 18, [Pure]> {
+def SPIRV_TosaBitwiseXorOp : SPIRV_TosaIntegerElementwiseBinaryOp<"BitwiseXor", 18, [Pure]> {
   let summary = "Bitwise XOR operator.";
 
   let description = [{
@@ -1004,21 +1012,6 @@ def SPIRV_TosaBitwiseXorOp : SPIRV_TosaElementwiseBinaryOp<"BitwiseXor", 18, [Pu
     %0 = spirv.Tosa.BitwiseXor %arg0, %arg1 : !spirv.arm.tensor<4x8x13x9xi16>, !spirv.arm.tensor<4x8x1x9xi16> -> !spirv.arm.tensor<4x8x13x9xi16>
     ```
   }];
-
-  let arguments = (ins
-    SPIRV_TosaInteger_TensorArm: $input1,
-    SPIRV_TosaInteger_TensorArm: $input2
-  );
-
-  let results = (outs
-    SPIRV_TosaInteger_TensorArm: $output
-  );
-
-  let assemblyFormat = [{
-    $input1 `,`
-    $input2
-    attr-dict `:` type(operands) `->` type(results)
-  }];
 }
 
 
@@ -1064,7 +1057,7 @@ def SPIRV_TosaIntDivOp : SPIRV_TosaElementwiseBinaryOp<"IntDiv", 19, [NoMemoryEf
 }
 
 
-def SPIRV_TosaLogicalAndOp : SPIRV_TosaElementwiseBinaryOp<"LogicalAnd", 20, [Pure]> {
+def SPIRV_TosaLogicalAndOp : SPIRV_TosaBoolElementwiseBinaryOp<"LogicalAnd", 20> {
   let summary = "Logical AND operator.";
 
   let description = [{
@@ -1080,25 +1073,10 @@ def SPIRV_TosaLogicalAndOp : SPIRV_TosaElementwiseBinaryOp<"LogicalAnd", 20, [Pu
     %0 = spirv.Tosa.LogicalAnd %arg0, %arg1 : !spirv.arm.tensor<2x1x7x11xi1>, !spirv.arm.tensor<2x4x7x11xi1> -> !spirv.arm.tensor<2x4x7x11xi1>
     ```
   }];
-
-  let arguments = (ins
-    SPIRV_Bool_TensorArm: $input1,
-    SPIRV_Bool_TensorArm: $input2
-  );
-
-  let results = (outs
-    SPIRV_Bool_TensorArm: $output
-  );
-
-  let assemblyFormat = [{
-    $input1 `,`
-    $input2
-    attr-dict `:` type(operands) `->` type(results)
-  }];
 }
 
 
-def SPIRV_TosaLogicalLeftShiftOp : SPIRV_TosaElementwiseBinaryOp<"LogicalLeftShift", 21, [NoMemoryEffect]> {
+def SPIRV_TosaLogicalLeftShiftOp : SPIRV_TosaIntegerElementwiseBinaryOp<"LogicalLeftShift", 21, [NoMemoryEffect]> {
   let summary = "Logical Left Shift operator.";
 
   let description = [{
@@ -1117,25 +1095,10 @@ def SPIRV_TosaLogicalLeftShiftOp : SPIRV_TosaElementwiseBinaryOp<"LogicalLeftShi
     %0 = spirv.Tosa.LogicalLeftShift %arg0, %arg1 : !spirv.arm.tensor<7x1x11x4xi8>, !spirv.arm.tensor<7x8x11x4xi8> -> !spirv.arm.tensor<7x8x11x4xi8>
     ```
   }];
-
-  let arguments = (ins
-    SPIRV_TosaInteger_TensorArm: $input1,
-    SPIRV_TosaInteger_TensorArm: $input2
-  );
-
-  let results = (outs
-    SPIRV_TosaInteger_TensorArm: $output
-  );
-
-  let assemblyFormat = [{
-    $input1 `,`
-    $input2
-    attr-dict `:` type(operands) `->` type(results)
-  }];
 }
 
 
-def SPIRV_TosaLogicalRightShiftOp : SPIRV_TosaElementwiseBinaryOp<"LogicalRightShift", 22, [NoMemoryEffect]> {
+def SPIRV_TosaLogicalRightShiftOp : SPIRV_TosaIntegerElementwiseBinaryOp<"LogicalRightShift", 22, [NoMemoryEffect]> {
   let summary = "Logical Right Shift operator.";
 
   let description = [{
@@ -1154,25 +1117,10 @@ def SPIRV_TosaLogicalRightShiftOp : SPIRV_TosaElementwiseBinaryOp<"LogicalRightS
     %0 = spirv.Tosa.LogicalRightShift %arg0, %arg1 : !spirv.arm.tensor<6x13x1x19xi8>, !spirv.arm.tensor<6x13x6x19xi8> -> !spirv.arm.tensor<6x13x6x19xi8>
     ```
   }];
-
-  let arguments = (ins
-    SPIRV_TosaInteger_TensorArm: $input1,
-    SPIRV_TosaInteger_TensorArm: $input2
-  );
-
-  let results = (outs
-    SPIRV_TosaInteger_TensorArm: $output
-  );
-
-  let assemblyFormat = [{
-    $input1 `,`
-    $input2
-    attr-dict `:` type(operands) `->` type(results)
-  }];
 }
 
 
-def SPIRV_TosaLogicalOrOp : SPIRV_TosaElementwiseBinaryOp<"LogicalOr", 23, [Pure]> {
+def SPIRV_TosaLogicalOrOp : SPIRV_TosaBoolElementwiseBinaryOp<"LogicalOr", 23> {
   let summary = "Logical OR operator.";
 
   let description = [{
@@ -1188,25 +1136,10 @@ def SPIRV_TosaLogicalOrOp : SPIRV_TosaElementwiseBinaryOp<"LogicalOr", 23, [Pure
     %0 = spirv.Tosa.LogicalOr %arg0, %arg1 : !spirv.arm.tensor<3x6x12x5xi1>, !spirv.arm.tensor<3x6x1x5xi1> -> !spirv.arm.tensor<3x6x12x5xi1>
     ```
   }];
-
-  let arguments = (ins
-    SPIRV_Bool_TensorArm: $input1,
-    SPIRV_Bool_TensorArm: $input2
-  );
-
-  let results = (outs
-    SPIRV_Bool_TensorArm: $output
-  );
-
-  let assemblyFormat = [{
-    $input1 `,`
-    $input2
-    attr-dict `:` type(operands) `->` type(results)
-  }];
 }
 
 
-def SPIRV_TosaLogicalXorOp : SPIRV_TosaElementwiseBinaryOp<"LogicalXor", 24, [Pure]> {
+def SPIRV_TosaLogicalXorOp : SPIRV_TosaBoolElementwiseBinaryOp<"LogicalXor", 24> {
   let summary = "Logical XOR operator.";
 
   let description = [{
@@ -1222,21 +1155,6 @@ def SPIRV_TosaLogicalXorOp : SPIRV_TosaElementwiseBinaryOp<"LogicalXor", 24, [Pu
     %0 = spirv.Tosa.LogicalXor %arg0, %arg1 : !spirv.arm.tensor<11x4x9x12xi1>, !spirv.arm.tensor<11x4x9x1xi1> -> !spirv.arm.tensor<11x4x9x12xi1>
     ```
   }];
-
-  let arguments = (ins
-    SPIRV_Bool_TensorArm: $input1,
-    SPIRV_Bool_TensorArm: $input2
-  );
-
-  let results = (outs
-    SPIRV_Bool_TensorArm: $output
-  );
-
-  let assemblyFormat = [{
-    $input1 `,`
-    $input2
-    attr-dict `:` type(operands) `->` type(results)
-  }];
 }