[Mlir-commits] [mlir] [MLIR][Mem2Reg] Add support for region control flow and SCF (PR #185036)

[llvmlistbot at llvm.org]

tdegioanni-nvidia wrote:

Yes sorry! The change was with respects to when the result value of a load is used as the value stored to the same alloca directly. This has been handled so far by doing the blocking uses rewrite in reverse topological order, so that if a reaching definition goes outdated and is replaced by a new value, it has already been fully materialized in IR so the IR mutation APIs will update them as well.

But with the new change, finalizePromotion in the region interface sometimes used one of those outdated reaching definition for the final rewiring. So it was introducing new uses of a load that was supposed to be deleted, in the cases where the reaching definition was set by a store originally using that load result. This is fixed by making the rewiring of the region happen even before the blocking uses replacement, so those values that grow outdated will also have been materialized by then to be replaced properly.

https://github.com/llvm/llvm-project/pull/185036