[Mlir-commits] [mlir] [XeVM] Add translation for XeVM cache-control attributes. (PR #181856)

[Charitha Saumya]

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@@ -420,10 +618,17 @@ class PrefetchToOCLPattern : public OpConversionPattern<PrefetchOp> {
   matchAndRewrite(PrefetchOp op, PrefetchOp::Adaptor adaptor,
                   ConversionPatternRewriter &rewriter) const override {
     auto loc = op.getLoc();
+    auto *moduleOp = op->getParentWithTrait<OpTrait::SymbolTable>();
+
     const std::string fnName{"_Z8prefetchPU3AS1Kcm"};
     Value one =
         LLVM::ConstantOp::create(rewriter, loc, rewriter.getI64Type(), 1);
     SmallVector<Value> args{op.getPtr(), one};
+
+    // Annotate pointer with cache control before passing to the call.
+    applyCacheControlAnnotation(rewriter, loc, op, args, moduleOp,
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charithaintc wrote:

nit: any specific reasons to send all the args here? why not send the address arg and replace it at the caller. 

https://github.com/llvm/llvm-project/pull/181856