[Mlir-commits] [mlir] 83bff14 - [MLIR][GPUToLLVMSPV] Relax the width check in gpu.shuffle lowering (#183445)

[llvmlistbot at llvm.org]

Author: Jianhui Li
Date: 2026-03-06T06:25:23-08:00
New Revision: 83bff14dfd5e56544dd594cafe26cf796ce81221

URL: https://github.com/llvm/llvm-project/commit/83bff14dfd5e56544dd594cafe26cf796ce81221
DIFF: https://github.com/llvm/llvm-project/commit/83bff14dfd5e56544dd594cafe26cf796ce81221.diff

LOG: [MLIR][GPUToLLVMSPV] Relax the width check in gpu.shuffle lowering (#183445)

This PR modifies gpu.shuffle lowering so only conduct the width check
when the subgroupsize attribute is available.

Added: 
    

Modified: 
    mlir/lib/Conversion/GPUToLLVMSPV/GPUToLLVMSPV.cpp
    mlir/test/Conversion/GPUToLLVMSPV/gpu-to-llvm-spv.mlir

Removed: 
    


################################################################################
diff  --git a/mlir/lib/Conversion/GPUToLLVMSPV/GPUToLLVMSPV.cpp b/mlir/lib/Conversion/GPUToLLVMSPV/GPUToLLVMSPV.cpp
index 8c92b7e2b718b..6efd137f513e9 100644
--- a/mlir/lib/Conversion/GPUToLLVMSPV/GPUToLLVMSPV.cpp
+++ b/mlir/lib/Conversion/GPUToLLVMSPV/GPUToLLVMSPV.cpp
@@ -304,11 +304,10 @@ struct GPUShuffleConversion final : ConvertOpToLLVMPattern<gpu::ShuffleOp> {
     return parentFunc.getIntelReqdSubGroupSize();
   }
 
-  static bool hasValidWidth(gpu::ShuffleOp op) {
+  static bool hasValidWidth(gpu::ShuffleOp op, int subgroupSize) {
     llvm::APInt val;
     Value width = op.getWidth();
-    return matchPattern(width, m_ConstantInt(&val)) &&
-           val == getSubgroupSize(op);
+    return matchPattern(width, m_ConstantInt(&val)) && val == subgroupSize;
   }
 
   static Value bitcastOrExtBeforeShuffle(Value oldVal, Location loc,
@@ -345,7 +344,8 @@ struct GPUShuffleConversion final : ConvertOpToLLVMPattern<gpu::ShuffleOp> {
   LogicalResult
   matchAndRewrite(gpu::ShuffleOp op, OpAdaptor adaptor,
                   ConversionPatternRewriter &rewriter) const final {
-    if (!hasValidWidth(op))
+    auto maybeSubgroupSize = getSubgroupSize(op);
+    if (maybeSubgroupSize && !hasValidWidth(op, maybeSubgroupSize.value()))
       return rewriter.notifyMatchFailure(
           op, "shuffle width and subgroup size mismatch");
 

diff  --git a/mlir/test/Conversion/GPUToLLVMSPV/gpu-to-llvm-spv.mlir b/mlir/test/Conversion/GPUToLLVMSPV/gpu-to-llvm-spv.mlir
index e56f3117e3b3c..ef5aa023bce51 100644
--- a/mlir/test/Conversion/GPUToLLVMSPV/gpu-to-llvm-spv.mlir
+++ b/mlir/test/Conversion/GPUToLLVMSPV/gpu-to-llvm-spv.mlir
@@ -344,6 +344,25 @@ gpu.module @shuffles {
 
 // -----
 
+// Check `gpu.shuffle` conversion with no explicit subgroup size.
+
+// CHECK: llvm.func spir_funccc @_Z17sub_group_shuffleij(i32, i32) -> i32 attributes {convergent, no_unwind, will_return}
+// CHECK-LABEL: llvm.func @gpu_shuffles(
+// CHECK-SAME: %[[ARG0:.*]]: i32, %[[ARG1:.*]]: i32
+// CHECK: %[[C16:.*]] = arith.constant 16 : i32
+// CHECK: %[[SHUF:.*]] = llvm.call spir_funccc @_Z17sub_group_shuffleij(%[[ARG0]], %[[ARG1]]) {convergent, no_unwind, will_return} : (i32, i32) -> i32
+// CHECK: %[[TRUE:.*]] = llvm.mlir.constant(true) : i1
+// CHECK: llvm.return
+gpu.module @shuffles_without_intel_reqd_sub_group_size_attribute {
+  llvm.func @gpu_shuffles(%val: i32, %id: i32) {
+    %width = arith.constant 16 : i32
+    %shuffleResult, %valid = gpu.shuffle idx %val, %id, %width : i32
+    llvm.return
+  }
+}
+
+// -----
+
 // Cannot convert due to shuffle width and target subgroup size mismatch
 
 gpu.module @shuffles_mismatch {