[Mlir-commits] [mlir] [MLIR][NVVM] Unify and move to a single tcgen05_mma_kind attr for all tcgen05.mma Ops (PR #184433)

[Rajat Bajpai]

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@@ -1,39 +1,40 @@
 // RUN: mlir-translate --mlir-to-llvmir %s | FileCheck %s
 
+
 // CHECK-LABEL: @nvvm_tcgen05_mma_mxf8f6f4_block_scale_cta_1
 llvm.func @nvvm_tcgen05_mma_mxf8f6f4_block_scale_cta_1(%d_tmem : !llvm.ptr<6>, %a_desc: i64, %adesc: i64, %b_desc: i64, %idesc: i32, %enable_input_d: i1, %scale_a: !llvm.ptr<6>, %scale_b : !llvm.ptr<6>) {
 
   // CHECK: call void @llvm.nvvm.tcgen05.mma.shared.mxf8f6f4.block_scale(ptr addrspace(6) {{%[0-9]+}}, i64 {{%[0-9]+}}, i64 {{%[0-9]+}}, i32 {{%[0-9]+}}, i1 {{%[0-9]+}}, ptr addrspace(6) {{%[0-9]+}}, ptr addrspace(6) {{%[0-9]+}}, i32 1, i32 0)
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rajatbajpai wrote:

Should we consider using a regex pattern to explicitly match the flag values? As written, this test does not verify the flag's values — only its presence, so a change in the flag's value would go undetected. This creates a gap in test coverage that could silently allow legitimate failures to slip through in the future.

not a comment for this change just something to think about CC @durga4github @schwarzschild-radius 

https://github.com/llvm/llvm-project/pull/184433