[Mlir-commits] [mlir] [mlir][vector] Allow signless integer element types in `vector.step` (PR #205142)

Victor Perez llvmlistbot at llvm.org
Fri Jun 26 10:02:28 PDT 2026


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victor-eds wrote:

We only support `indexBitwidth <= 64` as per how the lowering works. Larger bitwidths OOS for this PR.

https://github.com/llvm/llvm-project/pull/205142


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