[Mlir-commits] [mlir] [mlir][XeGPU][Transform] Add gather/scatter coalescing analysis. (PR #201684)

[Jianhui Li]

================
@@ -113,26 +113,26 @@ isValidGatherScatterBufferParams(Type offsetsTy, Type maskTy,
   return success();
 }
 
-// Validates a user-provided (or analysis-stamped) `coalesce_hint` against the
-// op's offsets type. The hint requests grouping `factor` contiguous elements
-// per lane along the innermost (fastest-changing) dimension, so that dimension
-// must be a multiple of `factor`. The further `lane_layout * factor` split is
-// chip-dependent (subgroup size) and is checked when the hint is lowered to a
-// layout, not here.
+// Validates the `contiguous_chunk` attribute against the op's offsets type:
+// the inner offsets dimension is contiguous in runs of `size`, so `size` must
+// be in [2, innermost offsets dim].
 static LogicalResult
-isValidCoalesceHint(xegpu::CoalesceHintAttr hint, Type offsetsTy,
-                    function_ref<InFlightDiagnostic()> emitError) {
-  if (!hint)
+isValidContiguousChunk(std::optional<uint64_t> chunk, Type offsetsTy,
+                       function_ref<InFlightDiagnostic()> emitError) {
+  if (!chunk)
     return success();
   auto offsetsVecTy = dyn_cast<VectorType>(offsetsTy);
   if (!offsetsVecTy)
     return emitError()
-           << "coalesce_hint requires vector offsets (one per lane).";
-  int64_t factor = hint.getFactor().getInt();
+           << "contiguous_chunk requires vector offsets (one per lane).";
+  int64_t size = static_cast<int64_t>(*chunk);
   int64_t inner = offsetsVecTy.getShape().back();
-  if (inner % factor != 0)
-    return emitError() << "coalesce_hint factor " << factor
-                       << " must divide the innermost offsets dim " << inner;
+  if (size < 2)
+    return emitError() << "contiguous_chunk " << size << " must be >= 2";
+  if (size > inner)
----------------
Jianhui-Li wrote:

consider using a stronger check: if(inner%size != 0)

https://github.com/llvm/llvm-project/pull/201684