[Mlir-commits] [mlir] [MLIR] Remove incorrect loop step in scf parallel loop tiling pass. (PR #203798)
Prem C
llvmlistbot at llvm.org
Sun Jun 14 15:23:52 PDT 2026
https://github.com/silent-bytesmith created https://github.com/llvm/llvm-project/pull/203798
Fixes #203693
>From 3318e74949f7303edfc81ee70c6c1d54dde8f27d Mon Sep 17 00:00:00 2001
From: silent-bytesmith <cpgh at google.com>
Date: Sun, 14 Jun 2026 15:12:17 -0700
Subject: [PATCH] [MLIR] Remove incorrect loop step multiplication in parallel
loop tiling inbound checks
---
.../SCF/Transforms/ParallelLoopTiling.cpp | 10 ++--
.../parallel-loop-tiling-inbound-check.mlir | 53 +++++++++++++++++--
2 files changed, 53 insertions(+), 10 deletions(-)
diff --git a/mlir/lib/Dialect/SCF/Transforms/ParallelLoopTiling.cpp b/mlir/lib/Dialect/SCF/Transforms/ParallelLoopTiling.cpp
index 081f5fb3dc8f2..e0810e615d66f 100644
--- a/mlir/lib/Dialect/SCF/Transforms/ParallelLoopTiling.cpp
+++ b/mlir/lib/Dialect/SCF/Transforms/ParallelLoopTiling.cpp
@@ -45,8 +45,8 @@ using namespace mlir::scf;
/// scf.parallel (%j0, %j1) = (0, 0) to (%arg4*tileSize[0],
/// %arg5*tileSize[1])
/// step (%arg4, %arg5)
-/// %inbound = (%j0 * %arg4 + %i0 < %arg2) &&
-/// (%j1 * %arg5 + %i1 < %arg3)
+/// %inbound = (%j0 + %i0 < %arg2) &&
+/// (%j1 + %i1 < %arg3)
/// scf.if (%inbound)
/// ....
///
@@ -145,10 +145,8 @@ mlir::scf::tileParallelLoop(ParallelOp op, ArrayRef<int64_t> tileSizes,
llvm::zip(outerLoop.getUpperBound(), outerLoop.getInductionVars(),
innerLoop.getInductionVars(), innerLoop.getStep())) {
// %in_bound = %in_bound &&
- // (%inner_iv * %inner_step + %outer_iv < %outer_upper_bound)
- Value index = arith::AddIOp::create(
- b, op.getLoc(),
- arith::MulIOp::create(b, op.getLoc(), innerIV, innerStep), outerIV);
+ // (%inner_iv + %outer_iv < %outer_upper_bound)
+ Value index = arith::AddIOp::create(b, op.getLoc(), innerIV, outerIV);
Value dimInbound = arith::CmpIOp::create(
b, op.getLoc(), arith::CmpIPredicate::ult, index, outerUpperBound);
inbound = arith::AndIOp::create(b, op.getLoc(), inbound, dimInbound);
diff --git a/mlir/test/Dialect/SCF/parallel-loop-tiling-inbound-check.mlir b/mlir/test/Dialect/SCF/parallel-loop-tiling-inbound-check.mlir
index 7491550c1dc7c..fc6cdc1f0ddd6 100644
--- a/mlir/test/Dialect/SCF/parallel-loop-tiling-inbound-check.mlir
+++ b/mlir/test/Dialect/SCF/parallel-loop-tiling-inbound-check.mlir
@@ -25,12 +25,10 @@ func.func @parallel_loop(%arg0 : index, %arg1 : index, %arg2 : index,
// CHECK: [[V9:%.*]] = arith.addi [[V7]], [[V3]] : index
// CHECK: [[V10:%.*]] = arith.addi [[V8]], [[V4]] : index
// CHECK: %true = arith.constant true
-// CHECK: [[V11:%.*]] = arith.muli [[V7]], [[ARG5]] : index
-// CHECK: [[V12:%.*]] = arith.addi [[V11]], [[V3]] : index
+// CHECK: [[V12:%.*]] = arith.addi [[V7]], [[V3]] : index
// CHECK: [[V13:%.*]] = arith.cmpi ult, [[V12]], [[ARG3]] : index
// CHECK: [[V14:%.*]] = arith.andi %true, [[V13]] : i1
-// CHECK: [[V15:%.*]] = arith.muli [[V8]], [[ARG6]] : index
-// CHECK: [[V16:%.*]] = arith.addi [[V15]], [[V4]] : index
+// CHECK: [[V16:%.*]] = arith.addi [[V8]], [[V4]] : index
// CHECK: [[V17:%.*]] = arith.cmpi ult, [[V16]], [[ARG4]] : index
// CHECK: [[V18:%.*]] = arith.andi [[V14]], [[V17]] : i1
// CHECK: scf.if [[V18]] {
@@ -147,3 +145,50 @@ func.func @tile_nested_in_non_ploop() {
// CHECK: }
// CHECK: }
// CHECK: }
+
+// -----
+
+func.func @parallel_loop_step_gt_one(%arg0 : index, %arg1 : index, %arg2 : index,
+ %arg3 : index, %arg4 : index, %arg5 : index,
+ %A: memref<?x?xf32>, %B: memref<?x?xf32>,
+ %C: memref<?x?xf32>, %result: memref<?x?xf32>) {
+ %c2 = arith.constant 2 : index
+ %c3 = arith.constant 3 : index
+ scf.parallel (%i0, %i1) = (%arg0, %arg1) to (%arg2, %arg3) step (%c2, %c3) {
+ %B_elem = memref.load %B[%i0, %i1] : memref<?x?xf32>
+ %C_elem = memref.load %C[%i0, %i1] : memref<?x?xf32>
+ %sum_elem = arith.addf %B_elem, %C_elem : f32
+ memref.store %sum_elem, %result[%i0, %i1] : memref<?x?xf32>
+ }
+ return
+}
+
+// CHECK-LABEL: func @parallel_loop_step_gt_one(
+// CHECK-SAME: [[ARG0:%.*]]: index, [[ARG1:%.*]]: index, [[ARG2:%.*]]: index, [[ARG3:%.*]]: index, [[ARG4:%.*]]: index, [[ARG5:%.*]]: index, [[ARG6:%.*]]: memref<?x?xf32>, [[ARG7:%.*]]: memref<?x?xf32>, [[ARG8:%.*]]: memref<?x?xf32>, [[ARG9:%.*]]: memref<?x?xf32>) {
+// CHECK-DAG: [[C0:%.*]] = arith.constant 0 : index
+// CHECK-DAG: [[C2:%.*]] = arith.constant 2 : index
+// CHECK-DAG: [[C3:%.*]] = arith.constant 3 : index
+// CHECK-DAG: [[C1:%.*]] = arith.constant 1 : index
+// CHECK-DAG: [[C4:%.*]] = arith.constant 4 : index
+// CHECK: [[V1:%.*]] = arith.muli [[C2]], [[C1]] : index
+// CHECK: [[V2:%.*]] = arith.muli [[C3]], [[C4]] : index
+// CHECK: scf.parallel ([[V3:%.*]], [[V4:%.*]]) = ([[ARG0]], [[ARG1]]) to ([[ARG2]], [[ARG3]]) step ([[V1]], [[V2]]) {
+// CHECK: scf.parallel ([[V7:%.*]], [[V8:%.*]]) = ([[C0]], [[C0]]) to ([[V1]], [[V2]]) step ([[C2]], [[C3]]) {
+// CHECK: [[V9:%.*]] = arith.addi [[V7]], [[V3]] : index
+// CHECK: [[V10:%.*]] = arith.addi [[V8]], [[V4]] : index
+// CHECK: %true = arith.constant true
+// CHECK: [[V12:%.*]] = arith.addi [[V7]], [[V3]] : index
+// CHECK: [[V13:%.*]] = arith.cmpi ult, [[V12]], [[ARG2]] : index
+// CHECK: [[V14:%.*]] = arith.andi %true, [[V13]] : i1
+// CHECK: [[V16:%.*]] = arith.addi [[V8]], [[V4]] : index
+// CHECK: [[V17:%.*]] = arith.cmpi ult, [[V16]], [[ARG3]] : index
+// CHECK: [[V18:%.*]] = arith.andi [[V14]], [[V17]] : i1
+// CHECK: scf.if [[V18]] {
+// CHECK: [[V19:%.*]] = memref.load [[ARG7]]{{\[}}[[V9]], [[V10]]] : memref<?x?xf32>
+// CHECK: [[V20:%.*]] = memref.load [[ARG8]]{{\[}}[[V9]], [[V10]]] : memref<?x?xf32>
+// CHECK: [[V21:%.*]] = arith.addf [[V19]], [[V20]] : f32
+// CHECK: memref.store [[V21]], [[ARG9]]{{\[}}[[V9]], [[V10]]] : memref<?x?xf32>
+// CHECK: }
+// CHECK: }
+// CHECK: }
+// CHECK: return
More information about the Mlir-commits
mailing list