[Mlir-commits] [mlir] [MLIR][XeVM] Add xevm.extf op as the inverse of xevm.truncf (PR #203124)

[Sang Ik Lee]

================
@@ -377,6 +377,26 @@ LogicalResult TruncfOp::verify() {
   return success();
 }
 
+LogicalResult ExtfOp::verify() {
+  Type srcTy = getSrc().getType();
+  Type dstTy = getDst().getType();
+  if (isa<VectorType>(srcTy) && !isa<VectorType>(dstTy))
----------------
silee2 wrote:

Good catch — yes. Switched to `isa<VectorType>(srcTy) != isa<VectorType>(dstTy)`. The old `&& !` let a scalar-src/vector-dst op slip through and then asserted in the bitwidth check, so I also added an `invalid.mlir` case (`invalid_xevm_extf_2`) covering that direction.

https://github.com/llvm/llvm-project/pull/203124