[Mlir-commits] [mlir] [MLIR][XeGPU] Support partial subgroup lane distribution (PR #201667)

[Sang Ik Lee]

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@@ -729,11 +729,23 @@ bool LayoutAttr::isCompatibleWith(const xegpu::DistributeLayoutAttr &other,
       if (getEffectiveSgLayoutAsInt() == other.getEffectiveSgLayoutAsInt() &&
           getEffectiveSgDataAsInt() == other.getEffectiveSgDataAsInt())
         return true;
-    if (level == xegpu::LayoutKind::Lane)
-      if (getEffectiveLaneLayoutAsInt() ==
-              other.getEffectiveLaneLayoutAsInt() &&
-          getEffectiveLaneDataAsInt() == other.getEffectiveLaneDataAsInt())
-        return true;
+    if (level == xegpu::LayoutKind::Lane) {
+      auto laneLayout = getEffectiveLaneLayoutAsInt();
+      auto otherLaneLayout = other.getEffectiveLaneLayoutAsInt();
+      auto laneData = getEffectiveLaneDataAsInt();
+      auto otherLaneData = other.getEffectiveLaneDataAsInt();
+      if (laneLayout == otherLaneLayout) {
+        return laneData == otherLaneData;
+      } else if (laneData == otherLaneData) {
+        if (laneLayout.size() == 2 && otherLaneLayout.size() == 2) {
+          // Target LaneLayout may be a fraction of this along distibuted dim
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silee2 wrote:

Yes. Which is the current restriction for lane distribution.

https://github.com/llvm/llvm-project/pull/201667