[Mlir-commits] [mlir] d1304bd - [mlir][acc] Offload verifier should print variable names (#202678)
llvmlistbot at llvm.org
llvmlistbot at llvm.org
Tue Jun 9 12:49:12 PDT 2026
Author: Razvan Lupusoru
Date: 2026-06-09T12:49:07-07:00
New Revision: d1304bd75f71c0c425d137da36f8d6a29d9aa0a2
URL: https://github.com/llvm/llvm-project/commit/d1304bd75f71c0c425d137da36f8d6a29d9aa0a2
DIFF: https://github.com/llvm/llvm-project/commit/d1304bd75f71c0c425d137da36f8d6a29d9aa0a2.diff
LOG: [mlir][acc] Offload verifier should print variable names (#202678)
The offload target verifier is used to ensure that all ssa values and
symbols have appropriate OpenACC mapping. When this is not the case, an
error is shown. However, showing variable names is useful and thus add
the functionality since OpenACCSupport has the means to retrieve them.
Added:
Modified:
mlir/lib/Dialect/OpenACC/Transforms/OffloadTargetVerifier.cpp
mlir/test/Dialect/OpenACC/offload-target-verifier.mlir
Removed:
################################################################################
diff --git a/mlir/lib/Dialect/OpenACC/Transforms/OffloadTargetVerifier.cpp b/mlir/lib/Dialect/OpenACC/Transforms/OffloadTargetVerifier.cpp
index 91a7c7d6489a4..62941686890ad 100644
--- a/mlir/lib/Dialect/OpenACC/Transforms/OffloadTargetVerifier.cpp
+++ b/mlir/lib/Dialect/OpenACC/Transforms/OffloadTargetVerifier.cpp
@@ -118,6 +118,16 @@ class OffloadTargetVerifier
return invalidSymsList;
}
+ /// Retrieve variable names for the given values.
+ static SmallVector<std::string>
+ getVariableNames(ArrayRef<Value> values, acc::OpenACCSupport &accSupport) {
+ SmallVector<std::string> names;
+ names.reserve(values.size());
+ for (Value value : values)
+ names.push_back(accSupport.getVariableName(value));
+ return names;
+ }
+
/// Check if the region has illegal live-in values.
bool hasIllegalLiveInValues(Operation *regionOp,
acc::OpenACCSupport &accSupport) const {
@@ -131,18 +141,33 @@ class OffloadTargetVerifier
bool hasIllegalValues = !invalidValues.empty();
if (hasIllegalValues) {
+ SmallVector<std::string> invalidVarNames =
+ getVariableNames(invalidValues, accSupport);
+
if (softCheck) {
// Emit warnings for each illegal value.
auto diag = regionOp->emitWarning("offload target verifier: ")
<< invalidValues.size() << " illegal live-in value(s)";
- for (auto [idx, invalidValue] : llvm::enumerate(invalidValues)) {
- diag.attachNote(invalidValue.getLoc()) << "value: " << invalidValue;
+ for (auto [invalidValue, name] :
+ llvm::zip(invalidValues, invalidVarNames)) {
+ if (name.empty()) {
+ diag.attachNote(invalidValue.getLoc()) << "value: " << invalidValue;
+ } else {
+ diag.attachNote(invalidValue.getLoc())
+ << "value: " << invalidValue << ", name: " << name;
+ }
}
} else {
- accSupport.emitNYI(regionOp->getLoc(),
- "offload target verifier failed due to " +
- Twine(invalidValues.size()) +
- " illegal live-in value(s)");
+ std::string message = "offload target verifier failed due to " +
+ std::to_string(invalidValues.size()) +
+ " illegal live-in value(s)";
+ SmallVector<std::string> availableVarNames;
+ for (const std::string &name : invalidVarNames)
+ if (!name.empty())
+ availableVarNames.push_back(name);
+ if (!availableVarNames.empty())
+ message += " including: " + llvm::join(availableVarNames, ", ");
+ accSupport.emitNYI(regionOp->getLoc(), message);
}
}
diff --git a/mlir/test/Dialect/OpenACC/offload-target-verifier.mlir b/mlir/test/Dialect/OpenACC/offload-target-verifier.mlir
index d4380de8e2a31..f004f150cdd37 100644
--- a/mlir/test/Dialect/OpenACC/offload-target-verifier.mlir
+++ b/mlir/test/Dialect/OpenACC/offload-target-verifier.mlir
@@ -31,6 +31,22 @@ func.func @test_memref_f32() {
// -----
+// Test memref live-in without data clause - should fail and print var name.
+func.func @test_memref_f32_with_var_name() {
+ // expected-note @below {{, name: my_scalar}}
+ %livein = memref.alloca() {acc.var_name = #acc.var_name<"my_scalar">} : memref<f32>
+ // expected-warning @below {{1 illegal live-in value(s)}}
+ acc.serial {
+ %load = memref.load %livein[] : memref<f32>
+ %accalloca = memref.alloca() : memref<f32>
+ memref.store %load, %accalloca[] : memref<f32>
+ acc.yield
+ }
+ return
+}
+
+// -----
+
// Test memref with copyin data clause - should pass
func.func @test_memref_f32_copyin() {
%alloca = memref.alloca() : memref<f32>
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