[Mlir-commits] [mlir] [mlir][SPIR-V] Add WeakLinkageAMD capability for Weak linkage type (PR #202590)

[Arseniy Obolenskiy]

https://github.com/aobolensk created https://github.com/llvm/llvm-project/pull/202590

Add WeakLinkageAMD capability and makes Weak linkage require it, enable running these tests through spirv-val

>From 2ed2910ea28f1f53a13fb9bb220850f1a0b0208e Mon Sep 17 00:00:00 2001
From: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: Tue, 9 Jun 2026 14:22:57 +0200
Subject: [PATCH] [mlir][SPIR-V] Add WeakLinkageAMD capability for Weak linkage
 type

---
 mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td       | 11 +++++++++--
 mlir/test/Dialect/SPIRV/Transforms/vce-deduction.mlir |  4 ++--
 mlir/test/Target/SPIRV/linkage-types.mlir             | 11 ++++++-----
 3 files changed, 17 insertions(+), 9 deletions(-)

diff --git a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
index 6fa3822e9a235..316040025810d 100644
--- a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
+++ b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
@@ -1202,6 +1202,12 @@ def SPIRV_C_ImageReadWriteLodAMD                        : I32EnumAttrCase<"Image
     Extension<[SPV_AMD_shader_image_load_store_lod]>
   ];
 }
+def SPIRV_C_WeakLinkageAMD                              : I32EnumAttrCase<"WeakLinkageAMD", 5181> {
+  list<I32EnumAttrCase> implies = [SPIRV_C_Linkage];
+  list<Availability> availability = [
+    Extension<[SPV_AMD_weak_linkage]>
+  ];
+}
 def SPIRV_C_Int64ImageEXT                               : I32EnumAttrCase<"Int64ImageEXT", 5016> {
   list<I32EnumAttrCase> implies = [SPIRV_C_Shader];
   list<Availability> availability = [
@@ -1577,7 +1583,8 @@ def SPIRV_CapabilityAttr :
       SPIRV_C_VariablePointersStorageBuffer, SPIRV_C_RayQueryProvisionalKHR,
       SPIRV_C_RayQueryKHR, SPIRV_C_RayTracingKHR, SPIRV_C_Float16ImageAMD,
       SPIRV_C_ImageGatherBiasLodAMD, SPIRV_C_FragmentMaskAMD, SPIRV_C_StencilExportEXT,
-      SPIRV_C_ImageReadWriteLodAMD, SPIRV_C_Int64ImageEXT, SPIRV_C_ShaderClockKHR,
+      SPIRV_C_ImageReadWriteLodAMD, SPIRV_C_WeakLinkageAMD, SPIRV_C_Int64ImageEXT,
+      SPIRV_C_ShaderClockKHR,
       SPIRV_C_FragmentFullyCoveredEXT, SPIRV_C_FragmentDensityEXT,
       SPIRV_C_ShaderNonUniform, SPIRV_C_RuntimeDescriptorArray,
       SPIRV_C_StorageTexelBufferArrayDynamicIndexing, SPIRV_C_RayTracingNV,
@@ -3722,7 +3729,7 @@ def SPIRV_LT_LinkOnceODR : I32EnumAttrCase<"LinkOnceODR", 2> {
 def SPIRV_LT_Weak        : I32EnumAttrCase<"Weak", 3> {
   list<Availability> availability = [
     Extension<[SPV_AMD_weak_linkage]>,
-    Capability<[SPIRV_C_Linkage]>
+    Capability<[SPIRV_C_WeakLinkageAMD]>
   ];
 }
 
diff --git a/mlir/test/Dialect/SPIRV/Transforms/vce-deduction.mlir b/mlir/test/Dialect/SPIRV/Transforms/vce-deduction.mlir
index 33d55f1521eb3..5ac467d143807 100644
--- a/mlir/test/Dialect/SPIRV/Transforms/vce-deduction.mlir
+++ b/mlir/test/Dialect/SPIRV/Transforms/vce-deduction.mlir
@@ -427,10 +427,10 @@ spirv.module Logical GLSL450 attributes {
   }
 }
 
-// CHECK: requires #spirv.vce<v1.0, [Linkage, Shader, Matrix], [SPV_AMD_weak_linkage]>
+// CHECK: requires #spirv.vce<v1.0, [WeakLinkageAMD, Shader, Linkage, Matrix], [SPV_AMD_weak_linkage]>
 spirv.module Logical GLSL450 attributes {
   spirv.target_env = #spirv.target_env<
-    #spirv.vce<v1.5, [Shader, Linkage], [SPV_AMD_weak_linkage]>,
+    #spirv.vce<v1.5, [Shader, WeakLinkageAMD], [SPV_AMD_weak_linkage]>,
     #spirv.resource_limits<>>
 } {
   spirv.GlobalVariable @weak_var {
diff --git a/mlir/test/Target/SPIRV/linkage-types.mlir b/mlir/test/Target/SPIRV/linkage-types.mlir
index bd9932f42ad6f..c2cc1029f2e8d 100644
--- a/mlir/test/Target/SPIRV/linkage-types.mlir
+++ b/mlir/test/Target/SPIRV/linkage-types.mlir
@@ -1,7 +1,8 @@
 // RUN: mlir-translate --no-implicit-module --test-spirv-roundtrip --split-input-file %s | FileCheck %s
-
-// SPV_AMD_weak_linkage's Weak value isn't in the bundled SPIRV-Tools grammar,
-// so this file skips the spirv-val step that other Target/SPIRV tests run.
+// RUN: %if spirv-tools %{ rm -rf %t %}
+// RUN: %if spirv-tools %{ mkdir %t %}
+// RUN: %if spirv-tools %{ mlir-translate --no-implicit-module --serialize-spirv --split-input-file --spirv-save-validation-files-with-prefix=%t/module %s %}
+// RUN: %if spirv-tools %{ spirv-val %t %}
 
 spirv.module Logical GLSL450 requires
     #spirv.vce<v1.0, [Shader, Linkage], [SPV_KHR_linkonce_odr]> {
@@ -19,7 +20,7 @@ spirv.module Logical GLSL450 requires
 // -----
 
 spirv.module Logical GLSL450 requires
-    #spirv.vce<v1.0, [Shader, Linkage], [SPV_AMD_weak_linkage]> {
+    #spirv.vce<v1.0, [Shader, WeakLinkageAMD], [SPV_AMD_weak_linkage]> {
   // CHECK: spirv.func @weak_fn() "None" attributes
   // CHECK-SAME: linkage_attributes = #spirv.linkage_attributes<linkage_name = "weak_fn", linkage_type = <Weak>>
   spirv.func @weak_fn() "None" attributes {
@@ -34,7 +35,7 @@ spirv.module Logical GLSL450 requires
 // -----
 
 spirv.module Logical GLSL450 requires
-    #spirv.vce<v1.0, [Shader, Linkage], [SPV_AMD_weak_linkage]> {
+    #spirv.vce<v1.0, [Shader, WeakLinkageAMD], [SPV_AMD_weak_linkage]> {
   // CHECK: spirv.GlobalVariable @weak_var
   // CHECK-SAME: linkage_attributes = #spirv.linkage_attributes<linkage_name = "weak_var", linkage_type = <Weak>>
   spirv.GlobalVariable @weak_var {