[Mlir-commits] [mlir] 3afd3a9 - [mlir][nvgpu] Add roundtrip tests for warpgroup MMA operations (#199272)

[llvmlistbot at llvm.org]

Author: Vaisman
Date: 2026-06-01T15:55:09+02:00
New Revision: 3afd3a99562704798e268162701c0ecb3b82e5a5

URL: https://github.com/llvm/llvm-project/commit/3afd3a99562704798e268162701c0ecb3b82e5a5
DIFF: https://github.com/llvm/llvm-project/commit/3afd3a99562704798e268162701c0ecb3b82e5a5.diff

LOG: [mlir][nvgpu] Add roundtrip tests for warpgroup MMA operations (#199272)

Add roundtrip tests for the following NVGPU dialect operations:
- `nvgpu.warpgroup.mma.init.accumulator`
- `nvgpu.warpgroup.mma.store`

These operations were present in the dialect but lacked roundtrip
test coverage in `roundtrip.mlir`. The tests verify that operand
and result types survive the parser/printer roundtrip.

Added: 
    

Modified: 
    mlir/test/Dialect/NVGPU/roundtrip.mlir

Removed: 
    


################################################################################
diff  --git a/mlir/test/Dialect/NVGPU/roundtrip.mlir b/mlir/test/Dialect/NVGPU/roundtrip.mlir
index ad516b4d2c200..77586fc9b7abf 100644
--- a/mlir/test/Dialect/NVGPU/roundtrip.mlir
+++ b/mlir/test/Dialect/NVGPU/roundtrip.mlir
@@ -69,3 +69,23 @@ func.func @async_cp(%dst : memref<2x7x5xf32, 3>, %src : memref<4x5xf32>){
   nvgpu.device_async_wait %token {numGroups = 1 : i32}
   return
 }
+
+// CHECK-LABEL: func @warpgroup_mma_init_accumulator
+func.func @warpgroup_mma_init_accumulator() {
+  // CHECK: %{{.*}} = nvgpu.warpgroup.mma.init.accumulator
+  // CHECK-SAME: -> <fragmented = vector<64x128xf32>>
+  %acc = nvgpu.warpgroup.mma.init.accumulator
+      -> !nvgpu.warpgroup.accumulator<fragmented = vector<64x128xf32>>
+  return
+}
+
+// CHECK-LABEL: func @warpgroup_mma_store
+func.func @warpgroup_mma_store(
+    %acc: !nvgpu.warpgroup.accumulator<fragmented = vector<64x128xf32>>,
+    %dst: memref<64x128xf32, 3>) {
+  // CHECK: nvgpu.warpgroup.mma.store %{{.*}}, %{{.*}} : <fragmented = vector<64x128xf32>> to memref<64x128xf32, 3>
+  nvgpu.warpgroup.mma.store %acc, %dst :
+      !nvgpu.warpgroup.accumulator<fragmented = vector<64x128xf32>>
+      to memref<64x128xf32, 3>
+  return
+}