[Mlir-commits] [mlir] 814c0e6 - [mlir][tosa] Switch matmul_t output to bf16 from fp16 (#212970)
llvmlistbot at llvm.org
llvmlistbot at llvm.org
Fri Jul 31 01:36:51 PDT 2026
Author: Jeremy Johnson
Date: 2026-07-31T09:36:47+01:00
New Revision: 814c0e672dfc81ae02a0772879f993a57bdbc1ad
URL: https://github.com/llvm/llvm-project/commit/814c0e672dfc81ae02a0772879f993a57bdbc1ad
DIFF: https://github.com/llvm/llvm-project/commit/814c0e672dfc81ae02a0772879f993a57bdbc1ad.diff
LOG: [mlir][tosa] Switch matmul_t output to bf16 from fp16 (#212970)
Note that this implements the TOSA specification change:
https://github.com/arm/tosa-specification/pull/67
---------
Signed-off-by: Jeremy Johnson <jeremy.johnson at arm.com>
Added:
Modified:
mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
mlir/test/Dialect/Tosa/invalid_extension.mlir
mlir/test/Dialect/Tosa/ops.mlir
mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
Removed:
################################################################################
diff --git a/mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc b/mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
index 6a6f87dabf3af..628f68924e007 100644
--- a/mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
+++ b/mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
@@ -72,8 +72,6 @@ profileComplianceMap = {
SpecificationVersion::V_1_1_DRAFT},
{{fp32T, fp16T, fp32T, fp16T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
- {{fp16T, fp16T, fp16T, fp16T, fp32T},
- SpecificationVersion::V_1_1_DRAFT},
{{fp32T, fp32T, fp32T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT}}}}},
{"tosa.max_pool2d",
@@ -1684,13 +1682,7 @@ extensionComplianceMap = {
{{{Extension::int16},
{{{i16T, i16T, i16T, i16T, i48T}, SpecificationVersion::V_1_1_DRAFT}}},
{{Extension::fp8e4m3},
- {{{fp8e4m3T, fp8e4m3T, fp8e4m3T, fp8e4m3T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{fp8e4m3T, fp16T, fp8e4m3T, fp16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{fp16T, fp8e4m3T, fp16T, fp8e4m3T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{fp8e4m3T, fp8e4m3T, fp8e4m3T, fp8e4m3T, fp32T},
+ {{{fp8e4m3T, fp8e4m3T, fp8e4m3T, fp8e4m3T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
{{fp8e4m3T, fp16T, fp8e4m3T, fp16T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
@@ -1700,94 +1692,114 @@ extensionComplianceMap = {
SpecificationVersion::V_1_1_DRAFT},
{{fp32T, fp8e4m3T, fp32T, fp8e4m3T, fp32T},
SpecificationVersion::V_1_1_DRAFT}}},
- {{Extension::fp8e4m3, Extension::fp8e5m2},
- {{{fp8e4m3T, fp8e5m2T, fp8e4m3T, fp8e5m2T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{fp8e5m2T, fp8e4m3T, fp8e5m2T, fp8e4m3T, fp16T},
+ {{Extension::fp8e4m3, Extension::fp8e5m2, Extension::bf16},
+ {{{fp8e4m3T, fp8e5m2T, fp8e4m3T, fp8e5m2T, bf16T},
SpecificationVersion::V_1_1_DRAFT},
- {{fp8e4m3T, fp8e5m2T, fp8e4m3T, fp8e5m2T, fp32T},
+ {{fp8e5m2T, fp8e4m3T, fp8e5m2T, fp8e4m3T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::fp8e4m3, Extension::fp8e5m2},
+ {{{fp8e4m3T, fp8e5m2T, fp8e4m3T, fp8e5m2T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
{{fp8e5m2T, fp8e4m3T, fp8e5m2T, fp8e4m3T, fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
{{Extension::bf16, Extension::fp8e4m3},
- {{{fp8e4m3T, bf16T, fp8e4m3T, bf16T, fp16T},
+ {{{fp8e4m3T, bf16T, fp8e4m3T, bf16T, bf16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bf16T, fp8e4m3T, bf16T, fp8e4m3T, fp16T},
+ {{bf16T, fp8e4m3T, bf16T, fp8e4m3T, bf16T},
SpecificationVersion::V_1_1_DRAFT},
{{fp8e4m3T, bf16T, fp8e4m3T, bf16T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
{{bf16T, fp8e4m3T, bf16T, fp8e4m3T, fp32T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{fp8e4m3T, fp8e4m3T, fp8e4m3T, fp8e4m3T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{fp8e4m3T, fp16T, fp8e4m3T, fp16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{fp16T, fp8e4m3T, fp16T, fp8e4m3T, bf16T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::fp8e4m3, Extension::mx_common, Extension::mx_fp8e4m3},
- {{{fp8e4m3T, bs32_fp8ue8m0_fp8e4m3T, fp8e4m3T, fp32T, fp16T},
+ {{Extension::fp8e4m3, Extension::mx_common, Extension::mx_fp8e4m3,
+ Extension::bf16},
+ {{{fp8e4m3T, bs32_fp8ue8m0_fp8e4m3T, fp8e4m3T, fp32T, bf16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp8e4m3T, fp8e4m3T, fp32T, fp8e4m3T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{fp8e4m3T, bs32_fp8ue8m0_fp8e4m3T, fp8e4m3T, fp32T, fp32T},
+ {{bs32_fp8ue8m0_fp8e4m3T, fp8e4m3T, fp32T, fp8e4m3T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::fp8e4m3, Extension::mx_common, Extension::mx_fp8e4m3},
+ {{{fp8e4m3T, bs32_fp8ue8m0_fp8e4m3T, fp8e4m3T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp8e4m3T, fp8e4m3T, fp32T, fp8e4m3T, fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::fp8e4m3, Extension::mx_common, Extension::mx_fp8e5m2},
- {{{fp8e4m3T, bs32_fp8ue8m0_fp8e5m2T, fp8e4m3T, fp32T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp8e5m2T, fp8e4m3T, fp32T, fp8e4m3T, fp16T},
+ {{Extension::fp8e4m3, Extension::mx_common, Extension::mx_fp8e5m2,
+ Extension::bf16},
+ {{{fp8e4m3T, bs32_fp8ue8m0_fp8e5m2T, fp8e4m3T, fp32T, bf16T},
SpecificationVersion::V_1_1_DRAFT},
- {{fp8e4m3T, bs32_fp8ue8m0_fp8e5m2T, fp8e4m3T, fp32T, fp32T},
+ {{bs32_fp8ue8m0_fp8e5m2T, fp8e4m3T, fp32T, fp8e4m3T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::fp8e4m3, Extension::mx_common, Extension::mx_fp8e5m2},
+ {{{fp8e4m3T, bs32_fp8ue8m0_fp8e5m2T, fp8e4m3T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp8e5m2T, fp8e4m3T, fp32T, fp8e4m3T, fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::fp8e4m3, Extension::mx_common, Extension::mx_fp6e3m2},
- {{{fp8e4m3T, bs32_fp8ue8m0_fp6e3m2T, fp8e4m3T, fp32T, fp16T},
+ {{Extension::fp8e4m3, Extension::mx_common, Extension::mx_fp6e3m2,
+ Extension::bf16},
+ {{{fp8e4m3T, bs32_fp8ue8m0_fp6e3m2T, fp8e4m3T, fp32T, bf16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp6e3m2T, fp8e4m3T, fp32T, fp8e4m3T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{fp8e4m3T, bs32_fp8ue8m0_fp6e3m2T, fp8e4m3T, fp32T, fp32T},
+ {{bs32_fp8ue8m0_fp6e3m2T, fp8e4m3T, fp32T, fp8e4m3T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::fp8e4m3, Extension::mx_common, Extension::mx_fp6e3m2},
+ {{{fp8e4m3T, bs32_fp8ue8m0_fp6e3m2T, fp8e4m3T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp6e3m2T, fp8e4m3T, fp32T, fp8e4m3T, fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::fp8e4m3, Extension::mx_common, Extension::mx_fp6e2m3},
- {{{fp8e4m3T, bs32_fp8ue8m0_fp6e2m3T, fp8e4m3T, fp32T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp6e2m3T, fp8e4m3T, fp32T, fp8e4m3T, fp16T},
+ {{Extension::fp8e4m3, Extension::mx_common, Extension::mx_fp6e2m3,
+ Extension::bf16},
+ {{{fp8e4m3T, bs32_fp8ue8m0_fp6e2m3T, fp8e4m3T, fp32T, bf16T},
SpecificationVersion::V_1_1_DRAFT},
- {{fp8e4m3T, bs32_fp8ue8m0_fp6e2m3T, fp8e4m3T, fp32T, fp32T},
+ {{bs32_fp8ue8m0_fp6e2m3T, fp8e4m3T, fp32T, fp8e4m3T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::fp8e4m3, Extension::mx_common, Extension::mx_fp6e2m3},
+ {{{fp8e4m3T, bs32_fp8ue8m0_fp6e2m3T, fp8e4m3T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp6e2m3T, fp8e4m3T, fp32T, fp8e4m3T, fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::fp8e4m3, Extension::mx_common, Extension::mx_fp4e2m1},
- {{{fp8e4m3T, bs32_fp8ue8m0_fp4e2m1T, fp8e4m3T, fp32T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp4e2m1T, fp8e4m3T, fp32T, fp8e4m3T, fp16T},
+ {{Extension::fp8e4m3, Extension::mx_common, Extension::mx_fp4e2m1,
+ Extension::bf16},
+ {{{fp8e4m3T, bs32_fp8ue8m0_fp4e2m1T, fp8e4m3T, fp32T, bf16T},
SpecificationVersion::V_1_1_DRAFT},
- {{fp8e4m3T, bs32_fp8ue8m0_fp4e2m1T, fp8e4m3T, fp32T, fp32T},
+ {{bs32_fp8ue8m0_fp4e2m1T, fp8e4m3T, fp32T, fp8e4m3T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::fp8e4m3, Extension::mx_common, Extension::mx_fp4e2m1},
+ {{{fp8e4m3T, bs32_fp8ue8m0_fp4e2m1T, fp8e4m3T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp4e2m1T, fp8e4m3T, fp32T, fp8e4m3T, fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::fp8e4m3, Extension::mx_common, Extension::mx_int8},
- {{{fp8e4m3T, bs32_fp8ue8m0_mxint8T, fp8e4m3T, fp32T, fp16T},
+ {{Extension::fp8e4m3, Extension::mx_common, Extension::mx_int8,
+ Extension::bf16},
+ {{{fp8e4m3T, bs32_fp8ue8m0_mxint8T, fp8e4m3T, fp32T, bf16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_mxint8T, fp8e4m3T, fp32T, fp8e4m3T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{fp8e4m3T, bs32_fp8ue8m0_mxint8T, fp8e4m3T, fp32T, fp32T},
+ {{bs32_fp8ue8m0_mxint8T, fp8e4m3T, fp32T, fp8e4m3T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::fp8e4m3, Extension::mx_common, Extension::mx_int8},
+ {{{fp8e4m3T, bs32_fp8ue8m0_mxint8T, fp8e4m3T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_mxint8T, fp8e4m3T, fp32T, fp8e4m3T, fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
{{Extension::fp8e5m2},
- {{{fp8e5m2T, fp8e5m2T, fp8e5m2T, fp8e5m2T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{fp8e5m2T, fp16T, fp8e5m2T, fp16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{fp16T, fp8e5m2T, fp16T, fp8e5m2T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{fp8e5m2T, fp8e5m2T, fp8e5m2T, fp8e5m2T, fp32T},
+ {{{fp8e5m2T, fp8e5m2T, fp8e5m2T, fp8e5m2T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
{{fp8e5m2T, fp16T, fp8e5m2T, fp16T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
@@ -1798,81 +1810,105 @@ extensionComplianceMap = {
{{fp32T, fp8e5m2T, fp32T, fp8e5m2T, fp32T},
SpecificationVersion::V_1_1_DRAFT}}},
{{Extension::bf16, Extension::fp8e5m2},
- {{{fp8e5m2T, bf16T, fp8e5m2T, bf16T, fp16T},
+ {{{fp8e5m2T, bf16T, fp8e5m2T, bf16T, bf16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bf16T, fp8e5m2T, bf16T, fp8e5m2T, fp16T},
+ {{bf16T, fp8e5m2T, bf16T, fp8e5m2T, bf16T},
SpecificationVersion::V_1_1_DRAFT},
{{fp8e5m2T, bf16T, fp8e5m2T, bf16T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
{{bf16T, fp8e5m2T, bf16T, fp8e5m2T, fp32T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{fp8e5m2T, fp8e5m2T, fp8e5m2T, fp8e5m2T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{fp8e5m2T, fp16T, fp8e5m2T, fp16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{fp16T, fp8e5m2T, fp16T, fp8e5m2T, bf16T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::fp8e5m2, Extension::mx_common, Extension::mx_fp8e4m3},
- {{{fp8e5m2T, bs32_fp8ue8m0_fp8e4m3T, fp8e5m2T, fp32T, fp16T},
+ {{Extension::fp8e5m2, Extension::mx_common, Extension::mx_fp8e4m3,
+ Extension::bf16},
+ {{{fp8e5m2T, bs32_fp8ue8m0_fp8e4m3T, fp8e5m2T, fp32T, bf16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp8e4m3T, fp8e5m2T, fp32T, fp8e5m2T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{fp8e5m2T, bs32_fp8ue8m0_fp8e4m3T, fp8e5m2T, fp32T, fp32T},
+ {{bs32_fp8ue8m0_fp8e4m3T, fp8e5m2T, fp32T, fp8e5m2T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::fp8e5m2, Extension::mx_common, Extension::mx_fp8e4m3},
+ {{{fp8e5m2T, bs32_fp8ue8m0_fp8e4m3T, fp8e5m2T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp8e4m3T, fp8e5m2T, fp32T, fp8e5m2T, fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::fp8e5m2, Extension::mx_common, Extension::mx_fp8e5m2},
- {{{fp8e5m2T, bs32_fp8ue8m0_fp8e5m2T, fp8e5m2T, fp32T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp8e5m2T, fp8e5m2T, fp32T, fp8e5m2T, fp16T},
+ {{Extension::fp8e5m2, Extension::mx_common, Extension::mx_fp8e5m2,
+ Extension::bf16},
+ {{{fp8e5m2T, bs32_fp8ue8m0_fp8e5m2T, fp8e5m2T, fp32T, bf16T},
SpecificationVersion::V_1_1_DRAFT},
- {{fp8e5m2T, bs32_fp8ue8m0_fp8e5m2T, fp8e5m2T, fp32T, fp32T},
+ {{bs32_fp8ue8m0_fp8e5m2T, fp8e5m2T, fp32T, fp8e5m2T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::fp8e5m2, Extension::mx_common, Extension::mx_fp8e5m2},
+ {{{fp8e5m2T, bs32_fp8ue8m0_fp8e5m2T, fp8e5m2T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp8e5m2T, fp8e5m2T, fp32T, fp8e5m2T, fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::fp8e5m2, Extension::mx_common, Extension::mx_fp6e3m2},
- {{{fp8e5m2T, bs32_fp8ue8m0_fp6e3m2T, fp8e5m2T, fp32T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp6e3m2T, fp8e5m2T, fp32T, fp8e5m2T, fp16T},
+ {{Extension::fp8e5m2, Extension::mx_common, Extension::mx_fp6e3m2,
+ Extension::bf16},
+ {{{fp8e5m2T, bs32_fp8ue8m0_fp6e3m2T, fp8e5m2T, fp32T, bf16T},
SpecificationVersion::V_1_1_DRAFT},
- {{fp8e5m2T, bs32_fp8ue8m0_fp6e3m2T, fp8e5m2T, fp32T, fp32T},
+ {{bs32_fp8ue8m0_fp6e3m2T, fp8e5m2T, fp32T, fp8e5m2T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::fp8e5m2, Extension::mx_common, Extension::mx_fp6e3m2},
+ {{{fp8e5m2T, bs32_fp8ue8m0_fp6e3m2T, fp8e5m2T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp6e3m2T, fp8e5m2T, fp32T, fp8e5m2T, fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::fp8e5m2, Extension::mx_common, Extension::mx_fp6e2m3},
- {{{fp8e5m2T, bs32_fp8ue8m0_fp6e2m3T, fp8e5m2T, fp32T, fp16T},
+ {{Extension::fp8e5m2, Extension::mx_common, Extension::mx_fp6e2m3,
+ Extension::bf16},
+ {{{fp8e5m2T, bs32_fp8ue8m0_fp6e2m3T, fp8e5m2T, fp32T, bf16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp6e2m3T, fp8e5m2T, fp32T, fp8e5m2T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{fp8e5m2T, bs32_fp8ue8m0_fp6e2m3T, fp8e5m2T, fp32T, fp32T},
+ {{bs32_fp8ue8m0_fp6e2m3T, fp8e5m2T, fp32T, fp8e5m2T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::fp8e5m2, Extension::mx_common, Extension::mx_fp6e2m3},
+ {{{fp8e5m2T, bs32_fp8ue8m0_fp6e2m3T, fp8e5m2T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp6e2m3T, fp8e5m2T, fp32T, fp8e5m2T, fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::fp8e5m2, Extension::mx_common, Extension::mx_fp4e2m1},
- {{{fp8e5m2T, bs32_fp8ue8m0_fp4e2m1T, fp8e5m2T, fp32T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp4e2m1T, fp8e5m2T, fp32T, fp8e5m2T, fp16T},
+ {{Extension::fp8e5m2, Extension::mx_common, Extension::mx_fp4e2m1,
+ Extension::bf16},
+ {{{fp8e5m2T, bs32_fp8ue8m0_fp4e2m1T, fp8e5m2T, fp32T, bf16T},
SpecificationVersion::V_1_1_DRAFT},
- {{fp8e5m2T, bs32_fp8ue8m0_fp4e2m1T, fp8e5m2T, fp32T, fp32T},
+ {{bs32_fp8ue8m0_fp4e2m1T, fp8e5m2T, fp32T, fp8e5m2T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::fp8e5m2, Extension::mx_common, Extension::mx_fp4e2m1},
+ {{{fp8e5m2T, bs32_fp8ue8m0_fp4e2m1T, fp8e5m2T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp4e2m1T, fp8e5m2T, fp32T, fp8e5m2T, fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::fp8e5m2, Extension::mx_common, Extension::mx_int8},
- {{{fp8e5m2T, bs32_fp8ue8m0_mxint8T, fp8e5m2T, fp32T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_mxint8T, fp8e5m2T, fp32T, fp8e5m2T, fp16T},
+ {{Extension::fp8e5m2, Extension::mx_common, Extension::mx_int8,
+ Extension::bf16},
+ {{{fp8e5m2T, bs32_fp8ue8m0_mxint8T, fp8e5m2T, fp32T, bf16T},
SpecificationVersion::V_1_1_DRAFT},
- {{fp8e5m2T, bs32_fp8ue8m0_mxint8T, fp8e5m2T, fp32T, fp32T},
+ {{bs32_fp8ue8m0_mxint8T, fp8e5m2T, fp32T, fp8e5m2T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::fp8e5m2, Extension::mx_common, Extension::mx_int8},
+ {{{fp8e5m2T, bs32_fp8ue8m0_mxint8T, fp8e5m2T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_mxint8T, fp8e5m2T, fp32T, fp8e5m2T, fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
{{Extension::bf16},
- {{{fp16T, bf16T, fp16T, bf16T, fp16T},
+ {{{fp16T, bf16T, fp16T, bf16T, bf16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bf16T, fp16T, bf16T, fp16T, fp16T},
+ {{bf16T, fp16T, bf16T, fp16T, bf16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bf16T, bf16T, bf16T, bf16T, fp16T},
+ {{bf16T, bf16T, bf16T, bf16T, bf16T},
SpecificationVersion::V_1_1_DRAFT},
{{fp16T, bf16T, fp16T, bf16T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
@@ -1885,13 +1921,7 @@ extensionComplianceMap = {
{{bf16T, bf16T, bf16T, bf16T, fp32T},
SpecificationVersion::V_1_1_DRAFT}}},
{{Extension::mx_common, Extension::mx_fp8e4m3},
- {{{fp16T, bs32_fp8ue8m0_fp8e4m3T, fp16T, fp32T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp8e4m3T, fp16T, fp32T, fp16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp8e4m3T, bs32_fp8ue8m0_fp8e4m3T, fp32T, fp32T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{fp16T, bs32_fp8ue8m0_fp8e4m3T, fp16T, fp32T, fp32T},
+ {{{fp16T, bs32_fp8ue8m0_fp8e4m3T, fp16T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
{{fp32T, bs32_fp8ue8m0_fp8e4m3T, fp32T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
@@ -1903,13 +1933,7 @@ extensionComplianceMap = {
SpecificationVersion::V_1_1_DRAFT}},
allOf},
{{Extension::mx_common, Extension::mx_fp8e5m2},
- {{{fp16T, bs32_fp8ue8m0_fp8e5m2T, fp16T, fp32T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp8e5m2T, fp16T, fp32T, fp16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp8e5m2T, bs32_fp8ue8m0_fp8e5m2T, fp32T, fp32T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{fp16T, bs32_fp8ue8m0_fp8e5m2T, fp16T, fp32T, fp32T},
+ {{{fp16T, bs32_fp8ue8m0_fp8e5m2T, fp16T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
{{fp32T, bs32_fp8ue8m0_fp8e5m2T, fp32T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
@@ -1921,13 +1945,7 @@ extensionComplianceMap = {
SpecificationVersion::V_1_1_DRAFT}},
allOf},
{{Extension::mx_common, Extension::mx_fp6e3m2},
- {{{fp16T, bs32_fp8ue8m0_fp6e3m2T, fp16T, fp32T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp6e3m2T, fp16T, fp32T, fp16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp6e3m2T, bs32_fp8ue8m0_fp6e3m2T, fp32T, fp32T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{fp16T, bs32_fp8ue8m0_fp6e3m2T, fp16T, fp32T, fp32T},
+ {{{fp16T, bs32_fp8ue8m0_fp6e3m2T, fp16T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
{{fp32T, bs32_fp8ue8m0_fp6e3m2T, fp32T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
@@ -1939,13 +1957,7 @@ extensionComplianceMap = {
SpecificationVersion::V_1_1_DRAFT}},
allOf},
{{Extension::mx_common, Extension::mx_fp6e2m3},
- {{{fp16T, bs32_fp8ue8m0_fp6e2m3T, fp16T, fp32T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp6e2m3T, fp16T, fp32T, fp16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp6e2m3T, bs32_fp8ue8m0_fp6e2m3T, fp32T, fp32T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{fp16T, bs32_fp8ue8m0_fp6e2m3T, fp16T, fp32T, fp32T},
+ {{{fp16T, bs32_fp8ue8m0_fp6e2m3T, fp16T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
{{fp32T, bs32_fp8ue8m0_fp6e2m3T, fp32T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
@@ -1957,13 +1969,7 @@ extensionComplianceMap = {
SpecificationVersion::V_1_1_DRAFT}},
allOf},
{{Extension::mx_common, Extension::mx_fp4e2m1},
- {{{fp16T, bs32_fp8ue8m0_fp4e2m1T, fp16T, fp32T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp4e2m1T, fp16T, fp32T, fp16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp4e2m1T, bs32_fp8ue8m0_fp4e2m1T, fp32T, fp32T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{fp16T, bs32_fp8ue8m0_fp4e2m1T, fp16T, fp32T, fp32T},
+ {{{fp16T, bs32_fp8ue8m0_fp4e2m1T, fp16T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
{{fp32T, bs32_fp8ue8m0_fp4e2m1T, fp32T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
@@ -1975,13 +1981,7 @@ extensionComplianceMap = {
SpecificationVersion::V_1_1_DRAFT}},
allOf},
{{Extension::mx_common, Extension::mx_int8},
- {{{fp16T, bs32_fp8ue8m0_mxint8T, fp16T, fp32T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_mxint8T, fp16T, fp32T, fp16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_mxint8T, bs32_fp8ue8m0_mxint8T, fp32T, fp32T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{fp16T, bs32_fp8ue8m0_mxint8T, fp16T, fp32T, fp32T},
+ {{{fp16T, bs32_fp8ue8m0_mxint8T, fp16T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
{{fp32T, bs32_fp8ue8m0_mxint8T, fp32T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
@@ -1993,211 +1993,292 @@ extensionComplianceMap = {
SpecificationVersion::V_1_1_DRAFT}},
allOf},
{{Extension::bf16, Extension::mx_common, Extension::mx_fp8e4m3},
- {{{bf16T, bs32_fp8ue8m0_fp8e4m3T, bf16T, fp32T, fp16T},
+ {{{bf16T, bs32_fp8ue8m0_fp8e4m3T, bf16T, fp32T, bf16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp8e4m3T, bf16T, fp32T, bf16T, fp16T},
+ {{bs32_fp8ue8m0_fp8e4m3T, bf16T, fp32T, bf16T, bf16T},
SpecificationVersion::V_1_1_DRAFT},
{{bf16T, bs32_fp8ue8m0_fp8e4m3T, bf16T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp8e4m3T, bf16T, fp32T, bf16T, fp32T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{fp16T, bs32_fp8ue8m0_fp8e4m3T, fp16T, fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp8e4m3T, fp16T, fp32T, fp16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp8e4m3T, bs32_fp8ue8m0_fp8e4m3T, fp32T, fp32T, bf16T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
{{Extension::bf16, Extension::mx_common, Extension::mx_fp8e5m2},
- {{{bf16T, bs32_fp8ue8m0_fp8e5m2T, bf16T, fp32T, fp16T},
+ {{{bf16T, bs32_fp8ue8m0_fp8e5m2T, bf16T, fp32T, bf16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp8e5m2T, bf16T, fp32T, bf16T, fp16T},
+ {{bs32_fp8ue8m0_fp8e5m2T, bf16T, fp32T, bf16T, bf16T},
SpecificationVersion::V_1_1_DRAFT},
{{bf16T, bs32_fp8ue8m0_fp8e5m2T, bf16T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp8e5m2T, bf16T, fp32T, bf16T, fp32T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{fp16T, bs32_fp8ue8m0_fp8e5m2T, fp16T, fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp8e5m2T, fp16T, fp32T, fp16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp8e5m2T, bs32_fp8ue8m0_fp8e5m2T, fp32T, fp32T, bf16T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
{{Extension::bf16, Extension::mx_common, Extension::mx_fp6e3m2},
- {{{bf16T, bs32_fp8ue8m0_fp6e3m2T, bf16T, fp32T, fp16T},
+ {{{bf16T, bs32_fp8ue8m0_fp6e3m2T, bf16T, fp32T, bf16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp6e3m2T, bf16T, fp32T, bf16T, fp16T},
+ {{bs32_fp8ue8m0_fp6e3m2T, bf16T, fp32T, bf16T, bf16T},
SpecificationVersion::V_1_1_DRAFT},
{{bf16T, bs32_fp8ue8m0_fp6e3m2T, bf16T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp6e3m2T, bf16T, fp32T, bf16T, fp32T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{fp16T, bs32_fp8ue8m0_fp6e3m2T, fp16T, fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp6e3m2T, fp16T, fp32T, fp16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp6e3m2T, bs32_fp8ue8m0_fp6e3m2T, fp32T, fp32T, bf16T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
{{Extension::bf16, Extension::mx_common, Extension::mx_fp6e2m3},
- {{{bf16T, bs32_fp8ue8m0_fp6e2m3T, bf16T, fp32T, fp16T},
+ {{{bf16T, bs32_fp8ue8m0_fp6e2m3T, bf16T, fp32T, bf16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp6e2m3T, bf16T, fp32T, bf16T, fp16T},
+ {{bs32_fp8ue8m0_fp6e2m3T, bf16T, fp32T, bf16T, bf16T},
SpecificationVersion::V_1_1_DRAFT},
{{bf16T, bs32_fp8ue8m0_fp6e2m3T, bf16T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp6e2m3T, bf16T, fp32T, bf16T, fp32T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{fp16T, bs32_fp8ue8m0_fp6e2m3T, fp16T, fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp6e2m3T, fp16T, fp32T, fp16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp6e2m3T, bs32_fp8ue8m0_fp6e2m3T, fp32T, fp32T, bf16T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
{{Extension::bf16, Extension::mx_common, Extension::mx_fp4e2m1},
- {{{bf16T, bs32_fp8ue8m0_fp4e2m1T, bf16T, fp32T, fp16T},
+ {{{bf16T, bs32_fp8ue8m0_fp4e2m1T, bf16T, fp32T, bf16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp4e2m1T, bf16T, fp32T, bf16T, fp16T},
+ {{bs32_fp8ue8m0_fp4e2m1T, bf16T, fp32T, bf16T, bf16T},
SpecificationVersion::V_1_1_DRAFT},
{{bf16T, bs32_fp8ue8m0_fp4e2m1T, bf16T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp4e2m1T, bf16T, fp32T, bf16T, fp32T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{fp16T, bs32_fp8ue8m0_fp4e2m1T, fp16T, fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp4e2m1T, fp16T, fp32T, fp16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp4e2m1T, bs32_fp8ue8m0_fp4e2m1T, fp32T, fp32T, bf16T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
{{Extension::bf16, Extension::mx_common, Extension::mx_int8},
- {{{bf16T, bs32_fp8ue8m0_mxint8T, bf16T, fp32T, fp16T},
+ {{{bf16T, bs32_fp8ue8m0_mxint8T, bf16T, fp32T, bf16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_mxint8T, bf16T, fp32T, bf16T, fp16T},
+ {{bs32_fp8ue8m0_mxint8T, bf16T, fp32T, bf16T, bf16T},
SpecificationVersion::V_1_1_DRAFT},
{{bf16T, bs32_fp8ue8m0_mxint8T, bf16T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_mxint8T, bf16T, fp32T, bf16T, fp32T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{fp16T, bs32_fp8ue8m0_mxint8T, fp16T, fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_mxint8T, fp16T, fp32T, fp16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_mxint8T, bs32_fp8ue8m0_mxint8T, fp32T, fp32T, bf16T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::mx_common, Extension::mx_fp8e4m3, Extension::mx_fp8e5m2},
- {{{bs32_fp8ue8m0_fp8e4m3T, bs32_fp8ue8m0_fp8e5m2T, fp32T, fp32T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp8e5m2T, bs32_fp8ue8m0_fp8e4m3T, fp32T, fp32T, fp16T},
+ {{Extension::mx_common, Extension::mx_fp8e4m3, Extension::mx_fp8e5m2,
+ Extension::bf16},
+ {{{bs32_fp8ue8m0_fp8e4m3T, bs32_fp8ue8m0_fp8e5m2T, fp32T, fp32T, bf16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp8e4m3T, bs32_fp8ue8m0_fp8e5m2T, fp32T, fp32T, fp32T},
+ {{bs32_fp8ue8m0_fp8e5m2T, bs32_fp8ue8m0_fp8e4m3T, fp32T, fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::mx_common, Extension::mx_fp8e4m3, Extension::mx_fp8e5m2},
+ {{{bs32_fp8ue8m0_fp8e4m3T, bs32_fp8ue8m0_fp8e5m2T, fp32T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp8e5m2T, bs32_fp8ue8m0_fp8e4m3T, fp32T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::mx_common, Extension::mx_fp6e3m2, Extension::mx_fp8e4m3},
- {{{bs32_fp8ue8m0_fp8e4m3T, bs32_fp8ue8m0_fp6e3m2T, fp32T, fp32T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp6e3m2T, bs32_fp8ue8m0_fp8e4m3T, fp32T, fp32T, fp16T},
+ {{Extension::mx_common, Extension::mx_fp6e3m2, Extension::mx_fp8e4m3,
+ Extension::bf16},
+ {{{bs32_fp8ue8m0_fp8e4m3T, bs32_fp8ue8m0_fp6e3m2T, fp32T, fp32T, bf16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp8e4m3T, bs32_fp8ue8m0_fp6e3m2T, fp32T, fp32T, fp32T},
+ {{bs32_fp8ue8m0_fp6e3m2T, bs32_fp8ue8m0_fp8e4m3T, fp32T, fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::mx_common, Extension::mx_fp6e3m2, Extension::mx_fp8e4m3},
+ {{{bs32_fp8ue8m0_fp8e4m3T, bs32_fp8ue8m0_fp6e3m2T, fp32T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp6e3m2T, bs32_fp8ue8m0_fp8e4m3T, fp32T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::mx_common, Extension::mx_fp6e2m3, Extension::mx_fp8e4m3},
- {{{bs32_fp8ue8m0_fp8e4m3T, bs32_fp8ue8m0_fp6e2m3T, fp32T, fp32T, fp16T},
+ {{Extension::mx_common, Extension::mx_fp6e2m3, Extension::mx_fp8e4m3,
+ Extension::bf16},
+ {{{bs32_fp8ue8m0_fp8e4m3T, bs32_fp8ue8m0_fp6e2m3T, fp32T, fp32T, bf16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp6e2m3T, bs32_fp8ue8m0_fp8e4m3T, fp32T, fp32T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp8e4m3T, bs32_fp8ue8m0_fp6e2m3T, fp32T, fp32T, fp32T},
+ {{bs32_fp8ue8m0_fp6e2m3T, bs32_fp8ue8m0_fp8e4m3T, fp32T, fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::mx_common, Extension::mx_fp6e2m3, Extension::mx_fp8e4m3},
+ {{{bs32_fp8ue8m0_fp8e4m3T, bs32_fp8ue8m0_fp6e2m3T, fp32T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp6e2m3T, bs32_fp8ue8m0_fp8e4m3T, fp32T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::mx_common, Extension::mx_fp4e2m1, Extension::mx_fp8e4m3},
- {{{bs32_fp8ue8m0_fp8e4m3T, bs32_fp8ue8m0_fp4e2m1T, fp32T, fp32T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp4e2m1T, bs32_fp8ue8m0_fp8e4m3T, fp32T, fp32T, fp16T},
+ {{Extension::mx_common, Extension::mx_fp4e2m1, Extension::mx_fp8e4m3,
+ Extension::bf16},
+ {{{bs32_fp8ue8m0_fp8e4m3T, bs32_fp8ue8m0_fp4e2m1T, fp32T, fp32T, bf16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp8e4m3T, bs32_fp8ue8m0_fp4e2m1T, fp32T, fp32T, fp32T},
+ {{bs32_fp8ue8m0_fp4e2m1T, bs32_fp8ue8m0_fp8e4m3T, fp32T, fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::mx_common, Extension::mx_fp4e2m1, Extension::mx_fp8e4m3},
+ {{{bs32_fp8ue8m0_fp8e4m3T, bs32_fp8ue8m0_fp4e2m1T, fp32T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp4e2m1T, bs32_fp8ue8m0_fp8e4m3T, fp32T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::mx_common, Extension::mx_fp8e4m3, Extension::mx_int8},
- {{{bs32_fp8ue8m0_fp8e4m3T, bs32_fp8ue8m0_mxint8T, fp32T, fp32T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_mxint8T, bs32_fp8ue8m0_fp8e4m3T, fp32T, fp32T, fp16T},
+ {{Extension::mx_common, Extension::mx_fp8e4m3, Extension::mx_int8,
+ Extension::bf16},
+ {{{bs32_fp8ue8m0_fp8e4m3T, bs32_fp8ue8m0_mxint8T, fp32T, fp32T, bf16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp8e4m3T, bs32_fp8ue8m0_mxint8T, fp32T, fp32T, fp32T},
+ {{bs32_fp8ue8m0_mxint8T, bs32_fp8ue8m0_fp8e4m3T, fp32T, fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::mx_common, Extension::mx_fp8e4m3, Extension::mx_int8},
+ {{{bs32_fp8ue8m0_fp8e4m3T, bs32_fp8ue8m0_mxint8T, fp32T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_mxint8T, bs32_fp8ue8m0_fp8e4m3T, fp32T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::mx_common, Extension::mx_fp6e3m2, Extension::mx_fp8e5m2},
- {{{bs32_fp8ue8m0_fp8e5m2T, bs32_fp8ue8m0_fp6e3m2T, fp32T, fp32T, fp16T},
+ {{Extension::mx_common, Extension::mx_fp6e3m2, Extension::mx_fp8e5m2,
+ Extension::bf16},
+ {{{bs32_fp8ue8m0_fp8e5m2T, bs32_fp8ue8m0_fp6e3m2T, fp32T, fp32T, bf16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp6e3m2T, bs32_fp8ue8m0_fp8e5m2T, fp32T, fp32T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp8e5m2T, bs32_fp8ue8m0_fp6e3m2T, fp32T, fp32T, fp32T},
+ {{bs32_fp8ue8m0_fp6e3m2T, bs32_fp8ue8m0_fp8e5m2T, fp32T, fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::mx_common, Extension::mx_fp6e3m2, Extension::mx_fp8e5m2},
+ {{{bs32_fp8ue8m0_fp8e5m2T, bs32_fp8ue8m0_fp6e3m2T, fp32T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp6e3m2T, bs32_fp8ue8m0_fp8e5m2T, fp32T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::mx_common, Extension::mx_fp6e2m3, Extension::mx_fp8e5m2},
- {{{bs32_fp8ue8m0_fp8e5m2T, bs32_fp8ue8m0_fp6e2m3T, fp32T, fp32T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp6e2m3T, bs32_fp8ue8m0_fp8e5m2T, fp32T, fp32T, fp16T},
+ {{Extension::mx_common, Extension::mx_fp6e2m3, Extension::mx_fp8e5m2,
+ Extension::bf16},
+ {{{bs32_fp8ue8m0_fp8e5m2T, bs32_fp8ue8m0_fp6e2m3T, fp32T, fp32T, bf16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp8e5m2T, bs32_fp8ue8m0_fp6e2m3T, fp32T, fp32T, fp32T},
+ {{bs32_fp8ue8m0_fp6e2m3T, bs32_fp8ue8m0_fp8e5m2T, fp32T, fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::mx_common, Extension::mx_fp6e2m3, Extension::mx_fp8e5m2},
+ {{{bs32_fp8ue8m0_fp8e5m2T, bs32_fp8ue8m0_fp6e2m3T, fp32T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp6e2m3T, bs32_fp8ue8m0_fp8e5m2T, fp32T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::mx_common, Extension::mx_fp4e2m1, Extension::mx_fp8e5m2},
- {{{bs32_fp8ue8m0_fp8e5m2T, bs32_fp8ue8m0_fp4e2m1T, fp32T, fp32T, fp16T},
+ {{Extension::mx_common, Extension::mx_fp4e2m1, Extension::mx_fp8e5m2,
+ Extension::bf16},
+ {{{bs32_fp8ue8m0_fp8e5m2T, bs32_fp8ue8m0_fp4e2m1T, fp32T, fp32T, bf16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp4e2m1T, bs32_fp8ue8m0_fp8e5m2T, fp32T, fp32T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp8e5m2T, bs32_fp8ue8m0_fp4e2m1T, fp32T, fp32T, fp32T},
+ {{bs32_fp8ue8m0_fp4e2m1T, bs32_fp8ue8m0_fp8e5m2T, fp32T, fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::mx_common, Extension::mx_fp4e2m1, Extension::mx_fp8e5m2},
+ {{{bs32_fp8ue8m0_fp8e5m2T, bs32_fp8ue8m0_fp4e2m1T, fp32T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp4e2m1T, bs32_fp8ue8m0_fp8e5m2T, fp32T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::mx_common, Extension::mx_fp8e5m2, Extension::mx_int8},
- {{{bs32_fp8ue8m0_fp8e5m2T, bs32_fp8ue8m0_mxint8T, fp32T, fp32T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_mxint8T, bs32_fp8ue8m0_fp8e5m2T, fp32T, fp32T, fp16T},
+ {{Extension::mx_common, Extension::mx_fp8e5m2, Extension::mx_int8,
+ Extension::bf16},
+ {{{bs32_fp8ue8m0_fp8e5m2T, bs32_fp8ue8m0_mxint8T, fp32T, fp32T, bf16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp8e5m2T, bs32_fp8ue8m0_mxint8T, fp32T, fp32T, fp32T},
+ {{bs32_fp8ue8m0_mxint8T, bs32_fp8ue8m0_fp8e5m2T, fp32T, fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::mx_common, Extension::mx_fp8e5m2, Extension::mx_int8},
+ {{{bs32_fp8ue8m0_fp8e5m2T, bs32_fp8ue8m0_mxint8T, fp32T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_mxint8T, bs32_fp8ue8m0_fp8e5m2T, fp32T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::mx_common, Extension::mx_fp6e2m3, Extension::mx_fp6e3m2},
- {{{bs32_fp8ue8m0_fp6e3m2T, bs32_fp8ue8m0_fp6e2m3T, fp32T, fp32T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp6e2m3T, bs32_fp8ue8m0_fp6e3m2T, fp32T, fp32T, fp16T},
+ {{Extension::mx_common, Extension::mx_fp6e2m3, Extension::mx_fp6e3m2,
+ Extension::bf16},
+ {{{bs32_fp8ue8m0_fp6e3m2T, bs32_fp8ue8m0_fp6e2m3T, fp32T, fp32T, bf16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp6e3m2T, bs32_fp8ue8m0_fp6e2m3T, fp32T, fp32T, fp32T},
+ {{bs32_fp8ue8m0_fp6e2m3T, bs32_fp8ue8m0_fp6e3m2T, fp32T, fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::mx_common, Extension::mx_fp6e2m3, Extension::mx_fp6e3m2},
+ {{{bs32_fp8ue8m0_fp6e3m2T, bs32_fp8ue8m0_fp6e2m3T, fp32T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp6e2m3T, bs32_fp8ue8m0_fp6e3m2T, fp32T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::mx_common, Extension::mx_fp4e2m1, Extension::mx_fp6e3m2},
- {{{bs32_fp8ue8m0_fp6e3m2T, bs32_fp8ue8m0_fp4e2m1T, fp32T, fp32T, fp16T},
+ {{Extension::mx_common, Extension::mx_fp4e2m1, Extension::mx_fp6e3m2,
+ Extension::bf16},
+ {{{bs32_fp8ue8m0_fp6e3m2T, bs32_fp8ue8m0_fp4e2m1T, fp32T, fp32T, bf16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp4e2m1T, bs32_fp8ue8m0_fp6e3m2T, fp32T, fp32T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp6e3m2T, bs32_fp8ue8m0_fp4e2m1T, fp32T, fp32T, fp32T},
+ {{bs32_fp8ue8m0_fp4e2m1T, bs32_fp8ue8m0_fp6e3m2T, fp32T, fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::mx_common, Extension::mx_fp4e2m1, Extension::mx_fp6e3m2},
+ {{{bs32_fp8ue8m0_fp6e3m2T, bs32_fp8ue8m0_fp4e2m1T, fp32T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp4e2m1T, bs32_fp8ue8m0_fp6e3m2T, fp32T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::mx_common, Extension::mx_fp6e3m2, Extension::mx_int8},
- {{{bs32_fp8ue8m0_fp6e3m2T, bs32_fp8ue8m0_mxint8T, fp32T, fp32T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_mxint8T, bs32_fp8ue8m0_fp6e3m2T, fp32T, fp32T, fp16T},
+ {{Extension::mx_common, Extension::mx_fp6e3m2, Extension::mx_int8,
+ Extension::bf16},
+ {{{bs32_fp8ue8m0_fp6e3m2T, bs32_fp8ue8m0_mxint8T, fp32T, fp32T, bf16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp6e3m2T, bs32_fp8ue8m0_mxint8T, fp32T, fp32T, fp32T},
+ {{bs32_fp8ue8m0_mxint8T, bs32_fp8ue8m0_fp6e3m2T, fp32T, fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::mx_common, Extension::mx_fp6e3m2, Extension::mx_int8},
+ {{{bs32_fp8ue8m0_fp6e3m2T, bs32_fp8ue8m0_mxint8T, fp32T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_mxint8T, bs32_fp8ue8m0_fp6e3m2T, fp32T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::mx_common, Extension::mx_fp4e2m1, Extension::mx_fp6e2m3},
- {{{bs32_fp8ue8m0_fp6e2m3T, bs32_fp8ue8m0_fp4e2m1T, fp32T, fp32T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp4e2m1T, bs32_fp8ue8m0_fp6e2m3T, fp32T, fp32T, fp16T},
+ {{Extension::mx_common, Extension::mx_fp4e2m1, Extension::mx_fp6e2m3,
+ Extension::bf16},
+ {{{bs32_fp8ue8m0_fp6e2m3T, bs32_fp8ue8m0_fp4e2m1T, fp32T, fp32T, bf16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp6e2m3T, bs32_fp8ue8m0_fp4e2m1T, fp32T, fp32T, fp32T},
+ {{bs32_fp8ue8m0_fp4e2m1T, bs32_fp8ue8m0_fp6e2m3T, fp32T, fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::mx_common, Extension::mx_fp4e2m1, Extension::mx_fp6e2m3},
+ {{{bs32_fp8ue8m0_fp6e2m3T, bs32_fp8ue8m0_fp4e2m1T, fp32T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp4e2m1T, bs32_fp8ue8m0_fp6e2m3T, fp32T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::mx_common, Extension::mx_fp6e2m3, Extension::mx_int8},
- {{{bs32_fp8ue8m0_fp6e2m3T, bs32_fp8ue8m0_mxint8T, fp32T, fp32T, fp16T},
+ {{Extension::mx_common, Extension::mx_fp6e2m3, Extension::mx_int8,
+ Extension::bf16},
+ {{{bs32_fp8ue8m0_fp6e2m3T, bs32_fp8ue8m0_mxint8T, fp32T, fp32T, bf16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_mxint8T, bs32_fp8ue8m0_fp6e2m3T, fp32T, fp32T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp6e2m3T, bs32_fp8ue8m0_mxint8T, fp32T, fp32T, fp32T},
+ {{bs32_fp8ue8m0_mxint8T, bs32_fp8ue8m0_fp6e2m3T, fp32T, fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::mx_common, Extension::mx_fp6e2m3, Extension::mx_int8},
+ {{{bs32_fp8ue8m0_fp6e2m3T, bs32_fp8ue8m0_mxint8T, fp32T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_mxint8T, bs32_fp8ue8m0_fp6e2m3T, fp32T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::mx_common, Extension::mx_fp4e2m1, Extension::mx_int8},
- {{{bs32_fp8ue8m0_fp4e2m1T, bs32_fp8ue8m0_mxint8T, fp32T, fp32T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_mxint8T, bs32_fp8ue8m0_fp4e2m1T, fp32T, fp32T, fp16T},
+ {{Extension::mx_common, Extension::mx_fp4e2m1, Extension::mx_int8,
+ Extension::bf16},
+ {{{bs32_fp8ue8m0_fp4e2m1T, bs32_fp8ue8m0_mxint8T, fp32T, fp32T, bf16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp4e2m1T, bs32_fp8ue8m0_mxint8T, fp32T, fp32T, fp32T},
+ {{bs32_fp8ue8m0_mxint8T, bs32_fp8ue8m0_fp4e2m1T, fp32T, fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::mx_common, Extension::mx_fp4e2m1, Extension::mx_int8},
+ {{{bs32_fp8ue8m0_fp4e2m1T, bs32_fp8ue8m0_mxint8T, fp32T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_mxint8T, bs32_fp8ue8m0_fp4e2m1T, fp32T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT}},
diff --git a/mlir/test/Dialect/Tosa/invalid_extension.mlir b/mlir/test/Dialect/Tosa/invalid_extension.mlir
index 991d105ceadd1..a1e5e28076349 100644
--- a/mlir/test/Dialect/Tosa/invalid_extension.mlir
+++ b/mlir/test/Dialect/Tosa/invalid_extension.mlir
@@ -378,12 +378,12 @@ func.func @test_cast_fp8_block_scaled(%arg0: tensor<4x32xf8E4M3FN>) -> tensor<4x
// -----
-func.func @test_matmul_t_mixed_block_scaled_operands(%arg0: tensor<4x8x32xf16>, %arg1: tensor<4x16x32x!tosa.block_scaled<BLOCK_SHAPE_32:f8E8M0FNU:f6E2M3FN>>) -> tensor<4x8x16xf16> {
+func.func @test_matmul_t_mixed_block_scaled_operands(%arg0: tensor<4x8x32xf16>, %arg1: tensor<4x16x32x!tosa.block_scaled<BLOCK_SHAPE_32:f8E8M0FNU:f6E2M3FN>>) -> tensor<4x8x16xbf16> {
%azp0 = "tosa.const"() <{values = dense<0.0> : tensor<1xf16>}> : () -> tensor<1xf16>
%bzp0 = "tosa.const"() <{values = dense<0.0> : tensor<1xf32>}> : () -> tensor<1xf32>
- // expected-error at +1 {{'tosa.matmul_t' op illegal: requires all of [mx_common, mx_fp6e2m3] profiles/extensions to be specified in the target environment}}
- %0 = tosa.matmul_t %arg0, %arg1, %azp0, %bzp0 : (tensor<4x8x32xf16>, tensor<4x16x32x!tosa.block_scaled<BLOCK_SHAPE_32:f8E8M0FNU:f6E2M3FN>>, tensor<1xf16>, tensor<1xf32>) -> tensor<4x8x16xf16>
- return %0 : tensor<4x8x16xf16>
+ // expected-error at +1 {{'tosa.matmul_t' op illegal: requires all of [bf16, mx_common, mx_fp6e2m3] profiles/extensions to be specified in the target environment}}
+ %0 = tosa.matmul_t %arg0, %arg1, %azp0, %bzp0 : (tensor<4x8x32xf16>, tensor<4x16x32x!tosa.block_scaled<BLOCK_SHAPE_32:f8E8M0FNU:f6E2M3FN>>, tensor<1xf16>, tensor<1xf32>) -> tensor<4x8x16xbf16>
+ return %0 : tensor<4x8x16xbf16>
}
// -----
diff --git a/mlir/test/Dialect/Tosa/ops.mlir b/mlir/test/Dialect/Tosa/ops.mlir
index fd134370327de..43aee928aee1f 100644
--- a/mlir/test/Dialect/Tosa/ops.mlir
+++ b/mlir/test/Dialect/Tosa/ops.mlir
@@ -288,11 +288,11 @@ func.func @test_matmul_t_bf16(%arg0: tensor<2x14x19xbf16>, %arg1: tensor<2x28x19
// -----
// CHECK-LABEL: test_matmul_t_fp8_mixed
-func.func @test_matmul_t_fp8_mixed(%arg0: tensor<2x14x19xf8E4M3FN>, %arg1: tensor<2x28x19xf8E5M2>) -> tensor<2x14x28xf16> {
+func.func @test_matmul_t_fp8_mixed(%arg0: tensor<2x14x19xf8E4M3FN>, %arg1: tensor<2x28x19xf8E5M2>) -> tensor<2x14x28xbf16> {
%azp0 = "tosa.const"() <{values = dense<0.0> : tensor<1xf8E4M3FN>}> : () -> tensor<1xf8E4M3FN>
%bzp0 = "tosa.const"() <{values = dense<0.0> : tensor<1xf8E5M2>}> : () -> tensor<1xf8E5M2>
-%0 = tosa.matmul_t %arg0, %arg1, %azp0, %bzp0 : (tensor<2x14x19xf8E4M3FN>, tensor<2x28x19xf8E5M2>, tensor<1xf8E4M3FN>, tensor<1xf8E5M2>) -> tensor<2x14x28xf16>
- return %0 : tensor<2x14x28xf16>
+%0 = tosa.matmul_t %arg0, %arg1, %azp0, %bzp0 : (tensor<2x14x19xf8E4M3FN>, tensor<2x28x19xf8E5M2>, tensor<1xf8E4M3FN>, tensor<1xf8E5M2>) -> tensor<2x14x28xbf16>
+ return %0 : tensor<2x14x28xbf16>
}
// -----
diff --git a/mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir b/mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
index 87a1c17ce1154..071db7a1ffc1b 100644
--- a/mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
+++ b/mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
@@ -53,11 +53,11 @@ func.func @test_matmul_t_with_block_scaled_inputs_type_fp4e2m1_fp6e2m3(%arg0: te
// -----
// CHECK-LABEL: test_matmul_t_f16_with_block_scaled_inputs_type_fp6e3m2
-func.func @test_matmul_t_f16_with_block_scaled_inputs_type_fp6e3m2(%arg0: tensor<4x8x32xf16>, %arg1: tensor<4x16x32x!tosa.block_scaled<BLOCK_SHAPE_32:f8E8M0FNU:f6E3M2FN>>) -> tensor<4x8x16xf16> {
+func.func @test_matmul_t_f16_with_block_scaled_inputs_type_fp6e3m2(%arg0: tensor<4x8x32xf16>, %arg1: tensor<4x16x32x!tosa.block_scaled<BLOCK_SHAPE_32:f8E8M0FNU:f6E3M2FN>>) -> tensor<4x8x16xbf16> {
%azp0 = "tosa.const"() <{values = dense<0.0> : tensor<1xf16>}> : () -> tensor<1xf16>
%bzp0 = "tosa.const"() <{values = dense<0.0> : tensor<1xf32>}> : () -> tensor<1xf32>
- %0 = tosa.matmul_t %arg0, %arg1, %azp0, %bzp0 : (tensor<4x8x32xf16>, tensor<4x16x32x!tosa.block_scaled<BLOCK_SHAPE_32:f8E8M0FNU:f6E3M2FN>>, tensor<1xf16>, tensor<1xf32>) -> tensor<4x8x16xf16>
- return %0 : tensor<4x8x16xf16>
+ %0 = tosa.matmul_t %arg0, %arg1, %azp0, %bzp0 : (tensor<4x8x32xf16>, tensor<4x16x32x!tosa.block_scaled<BLOCK_SHAPE_32:f8E8M0FNU:f6E3M2FN>>, tensor<1xf16>, tensor<1xf32>) -> tensor<4x8x16xbf16>
+ return %0 : tensor<4x8x16xbf16>
}
// -----
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