[Mlir-commits] [mlir] [mlir] Fix mem2reg crash on scalable vector store/load with matching type (PR #209426)

Théo Degioanni llvmlistbot at llvm.org
Sun Jul 19 13:54:34 PDT 2026


Moxinilian wrote:

@gysit  I'm a bit out of the loop with respect to the LLVM implementation of MemorySlot, so I trust your judgement.

@iamaayushrivastava do you have merge rights into the LLVM repo?

https://github.com/llvm/llvm-project/pull/209426


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