[Mlir-commits] [mlir] [mlir][xegpu] Support N-D block transfers in VectorToXeGPU (PR #210527)

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``````````bash
git-clang-format --diff origin/main HEAD --extensions cpp -- mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp --diff_from_common_commit
``````````

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View the diff from clang-format here.
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``````````diff
diff --git a/mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp b/mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp
index 306ce6f1e..e7f7e9340 100644
--- a/mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp
+++ b/mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp
@@ -77,7 +77,8 @@ static bool isInnermostTwoDimsTransposed(AffineMap map) {
     if (map.getResult(i) != getAffineDimExpr(numInputs - numResults + i, ctx))
       return false;
   // The innermost two results must be the last two input dims, swapped.
-  return map.getResult(numResults - 2) == getAffineDimExpr(numInputs - 1, ctx) &&
+  return map.getResult(numResults - 2) ==
+             getAffineDimExpr(numInputs - 1, ctx) &&
          map.getResult(numResults - 1) == getAffineDimExpr(numInputs - 2, ctx);
 }
 
@@ -760,13 +761,13 @@ struct TransferWriteLowering
 
     // Prefer an nd block store. It requires HW block-store support, a >1D
     // vector of a scalar element type backed by a scalar-element memref, and a
-    // minor-identity map (block stores have no transpose support). Out-of-bounds
-    // writes are handled by the descriptor's boundary check.
+    // minor-identity map (block stores have no transpose support).
+    // Out-of-bounds writes are handled by the descriptor's boundary check.
     AffineMap map = writeOp.getPermutationMap();
-    bool canLowerToStoreNd =
-        hasBlockStoreSupport && vecTy.getRank() > 1 && map.isMinorIdentity() &&
-        vecTy.getElementType().isIntOrFloat() &&
-        writeMemTy.getElementType().isIntOrFloat();
+    bool canLowerToStoreNd = hasBlockStoreSupport && vecTy.getRank() > 1 &&
+                             map.isMinorIdentity() &&
+                             vecTy.getElementType().isIntOrFloat() &&
+                             writeMemTy.getElementType().isIntOrFloat();
 
     if (canLowerToStoreNd) {
       auto [src, indices] = convertMemrefAndOffsetsToTargetRank(
@@ -782,18 +783,17 @@ struct TransferWriteLowering
       xegpu::CreateNdDescOp ndDesc = createNdDescriptor(
           rewriter, loc, descType, dyn_cast<TypedValue<MemRefType>>(src));
 
-      auto storeOp =
-          xegpu::StoreNdOp::create(rewriter, loc, writeOp.getVector(), ndDesc,
-                                   indices,
-                                   /*l1_hint=*/hint,
-                                   /*l2_hint=*/hint, /*l3_hint=*/hint,
-                                   /*layout=*/nullptr);
+      auto storeOp = xegpu::StoreNdOp::create(
+          rewriter, loc, writeOp.getVector(), ndDesc, indices,
+          /*l1_hint=*/hint,
+          /*l2_hint=*/hint, /*l3_hint=*/hint,
+          /*layout=*/nullptr);
       rewriter.replaceOp(writeOp, storeOp);
       return success();
     }
 
-    // Fall back to a scattered store. It supports arbitrary permutations and any
-    // rank, but cannot express out-of-bounds accesses.
+    // Fall back to a scattered store. It supports arbitrary permutations and
+    // any rank, but cannot express out-of-bounds accesses.
     // TODO: add support for OutOfBound access.
     if (writeOp.hasOutOfBoundsDim())
       return failure();

``````````

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https://github.com/llvm/llvm-project/pull/210527