[Mlir-commits] [mlir] dc8ee15 - [mlir][SPIR-V] Add SPIRVToLLVM conversion for SNegate (#206950)
llvmlistbot at llvm.org
llvmlistbot at llvm.org
Mon Jul 13 02:44:34 PDT 2026
Author: Arseniy Obolenskiy
Date: 2026-07-13T11:44:29+02:00
New Revision: dc8ee15f2bbc5b18316f071c5ae746bd95609ade
URL: https://github.com/llvm/llvm-project/commit/dc8ee15f2bbc5b18316f071c5ae746bd95609ade
DIFF: https://github.com/llvm/llvm-project/commit/dc8ee15f2bbc5b18316f071c5ae746bd95609ade.diff
LOG: [mlir][SPIR-V] Add SPIRVToLLVM conversion for SNegate (#206950)
Added:
Modified:
mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
mlir/test/Conversion/SPIRVToLLVM/arithmetic-ops-to-llvm.mlir
Removed:
################################################################################
diff --git a/mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp b/mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
index 0822c44c10f1d..f8c4405157f94 100644
--- a/mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
+++ b/mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
@@ -80,27 +80,25 @@ static unsigned getLLVMTypeBitWidth(Type type) {
return cast<IntegerType>(type).getWidth();
}
-/// Creates `IntegerAttribute` with all bits set for given type
-static IntegerAttr minusOneIntegerAttribute(Type type, Builder builder) {
- if (auto vecType = dyn_cast<VectorType>(type)) {
- auto integerType = cast<IntegerType>(vecType.getElementType());
- return builder.getIntegerAttr(integerType, -1);
- }
- auto integerType = cast<IntegerType>(type);
- return builder.getIntegerAttr(integerType, -1);
+/// Creates `llvm.mlir.constant` with a scalar or vector integer value,
+/// broadcasting `scalarAttr` across the vector if `srcType` is a vector.
+static Value createIntegerConstant(Location loc, Type srcType, Type dstType,
+ PatternRewriter &rewriter,
+ IntegerAttr scalarAttr) {
+ if (auto vecType = dyn_cast<VectorType>(srcType))
+ return LLVM::ConstantOp::create(
+ rewriter, loc, dstType, SplatElementsAttr::get(vecType, scalarAttr));
+ return LLVM::ConstantOp::create(rewriter, loc, dstType, scalarAttr);
}
/// Creates `llvm.mlir.constant` with all bits set for the given type.
static Value createConstantAllBitsSet(Location loc, Type srcType, Type dstType,
PatternRewriter &rewriter) {
- if (isa<VectorType>(srcType)) {
- return LLVM::ConstantOp::create(
- rewriter, loc, dstType,
- SplatElementsAttr::get(cast<ShapedType>(srcType),
- minusOneIntegerAttribute(srcType, rewriter)));
- }
- return LLVM::ConstantOp::create(rewriter, loc, dstType,
- minusOneIntegerAttribute(srcType, rewriter));
+ auto integerType = cast<IntegerType>(
+ isa<VectorType>(srcType) ? cast<VectorType>(srcType).getElementType()
+ : srcType);
+ return createIntegerConstant(loc, srcType, dstType, rewriter,
+ rewriter.getIntegerAttr(integerType, -1));
}
/// Creates `llvm.mlir.constant` with a floating-point scalar or vector value.
@@ -921,6 +919,30 @@ class InverseSqrtPattern
}
};
+/// Converts `spirv.SNegate` to `0 - x`.
+class SNegatePattern : public SPIRVToLLVMConversion<spirv::SNegateOp> {
+public:
+ using SPIRVToLLVMConversion<spirv::SNegateOp>::SPIRVToLLVMConversion;
+
+ LogicalResult
+ matchAndRewrite(spirv::SNegateOp op, OpAdaptor adaptor,
+ ConversionPatternRewriter &rewriter) const override {
+ Type srcType = op.getType();
+ Type dstType = getTypeConverter()->convertType(srcType);
+ if (!dstType)
+ return rewriter.notifyMatchFailure(op, "type conversion failed");
+
+ Location loc = op.getLoc();
+ IntegerAttr zeroAttr = rewriter.getIntegerAttr(
+ cast<IntegerType>(getElementTypeOrSelf(srcType)), 0);
+ Value zero =
+ createIntegerConstant(loc, srcType, dstType, rewriter, zeroAttr);
+ rewriter.replaceOpWithNewOp<LLVM::SubOp>(op, dstType, zero,
+ adaptor.getOperand());
+ return success();
+ }
+};
+
/// Converts the GLSL clamp ops (FClamp, SClamp, UClamp) into a nested
/// min/max sequence, following the op semantics `min(max(x, minVal), maxVal)`.
template <typename SPIRVOp, typename LLVMMinOp, typename LLVMMaxOp>
@@ -995,13 +1017,7 @@ class NotPattern : public SPIRVToLLVMConversion<SPIRVOp> {
return rewriter.notifyMatchFailure(notOp, "type conversion failed");
Location loc = notOp.getLoc();
- IntegerAttr minusOne = minusOneIntegerAttribute(srcType, rewriter);
- auto mask =
- isa<VectorType>(srcType)
- ? LLVM::ConstantOp::create(
- rewriter, loc, dstType,
- SplatElementsAttr::get(cast<VectorType>(srcType), minusOne))
- : LLVM::ConstantOp::create(rewriter, loc, dstType, minusOne);
+ Value mask = createConstantAllBitsSet(loc, srcType, dstType, rewriter);
rewriter.template replaceOpWithNewOp<LLVM::XOrOp>(notOp, dstType,
notOp.getOperand(), mask);
return success();
@@ -1957,7 +1973,7 @@ void mlir::populateSPIRVToLLVMConversionPatterns(
DirectConversionPattern<spirv::SDivOp, LLVM::SDivOp>,
DirectConversionPattern<spirv::SRemOp, LLVM::SRemOp>,
DirectConversionPattern<spirv::UDivOp, LLVM::UDivOp>,
- DirectConversionPattern<spirv::UModOp, LLVM::URemOp>,
+ DirectConversionPattern<spirv::UModOp, LLVM::URemOp>, SNegatePattern,
// Bitwise ops
BitFieldInsertPattern, BitFieldUExtractPattern, BitFieldSExtractPattern,
diff --git a/mlir/test/Conversion/SPIRVToLLVM/arithmetic-ops-to-llvm.mlir b/mlir/test/Conversion/SPIRVToLLVM/arithmetic-ops-to-llvm.mlir
index dbbf8610afb4d..ee9c06fbb10e1 100644
--- a/mlir/test/Conversion/SPIRVToLLVM/arithmetic-ops-to-llvm.mlir
+++ b/mlir/test/Conversion/SPIRVToLLVM/arithmetic-ops-to-llvm.mlir
@@ -233,3 +233,23 @@ spirv.func @srem_vector(%arg0: vector<4xi32>, %arg1: vector<4xi32>) "None" {
%0 = spirv.SRem %arg0, %arg1 : vector<4xi32>
spirv.Return
}
+
+//===----------------------------------------------------------------------===//
+// spirv.SNegate
+//===----------------------------------------------------------------------===//
+
+// CHECK-LABEL: @snegate_scalar
+spirv.func @snegate_scalar(%arg0: i32) "None" {
+ // CHECK: %[[ZERO:.*]] = llvm.mlir.constant(0 : i32) : i32
+ // CHECK: llvm.sub %[[ZERO]], %{{.*}} : i32
+ %0 = spirv.SNegate %arg0 : i32
+ spirv.Return
+}
+
+// CHECK-LABEL: @snegate_vector
+spirv.func @snegate_vector(%arg0: vector<4xi32>) "None" {
+ // CHECK: %[[ZERO:.*]] = llvm.mlir.constant(dense<0> : vector<4xi32>) : vector<4xi32>
+ // CHECK: llvm.sub %[[ZERO]], %{{.*}} : vector<4xi32>
+ %0 = spirv.SNegate %arg0 : vector<4xi32>
+ spirv.Return
+}
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