[Mlir-commits] [mlir] [NVGPU][NVVM] Add FP8 (e4m3/e5m2) support to dense mma.sync (PR #207307)

[Guray Ozen]

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@@ -2705,9 +2705,13 @@ class NVVM_MMA_OPS {
   list<list<WMMA_REGS>> bit_mma_ops = MMA_OPS<
             [GEOM<8,8,128>, GEOM<16,8,128>, GEOM<16,8,256>],
             ["b1"], [], ["s32"], []>.ret;
+  list<list<WMMA_REGS>> fp8_mma_ops = MMA_OPS<
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grypp wrote:

Thanks for your work. I would split this PR into 2 pieces. One for nvvm and another for nvgpu. 

we also need to write tests for nvvm case. 

https://github.com/llvm/llvm-project/pull/207307