[Mlir-commits] [mlir] [mlir][AMDGPU] Avoid verifier crash in DPPOp on vector operand types (PR #178887)

[Muzammiluddin Syed]

================
@@ -675,11 +675,11 @@ LogicalResult SparseMFMAOp::verify() {
 //===----------------------------------------------------------------------===//
 LogicalResult DPPOp::verify() {
   Type srcType = getSrc().getType();
-  if (srcType.getIntOrFloatBitWidth() > 64) {
+  Type elemType = getElementTypeOrSelf(srcType);
+  if (elemType.getIntOrFloatBitWidth() > 64) {
     return emitOpError("integer and floating point types larger than 64 bits "
                        "are not supported");
   }
----------------
Muzammiluddin-Syed-ECE wrote:

To find out more about ODS there's a page about it in the MLIR docs: [ODS](https://mlir.llvm.org/docs/DefiningDialects/Operations/).

One thing that ODS helps us do is move repetitive code out of C++ and into TableGen. One way we could move the check you've implemented into ODS is by making the following change in `mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td`:

From:
```TableGen
def AnyIntegerOrFloat : AnyTypeOf<[AnySignlessInteger, AnyFloat], "Integer or Float">;

def AnyIntegerOrFloatOr1DVector :
  AnyTypeOf<[AnyIntegerOrFloat, FixedVectorOfRankAndType<[1], [AnyIntegerOrFloat]>]>;
```
To:
```TableGen
def AnyIntegerOrFloatOfWidthLeq64 : AnyTypeOf<[
  AnyIntegerOfWidth<64, 32, 16, 8, 4, 1>,
  AnyFloatOfWidth<64, 32, 16, 8, 4, 2, 1>
]>;

def AnyIntegerOrFloatOr1DVector :
  AnyTypeOf<[AnyIntegerOrFloatOfWidthLeq64, FixedVectorOfRankAndType<[1], [AnyIntegerOrFloatOfWidthLeq64]>]>;
```

Then using this as the operand type in the tablegen definition of the DPPOp would let us skip having to write this verifier in C++ entirely.

So change the DPPOp operand type from
```
  Arguments<(ins AnyType:$old,
                 AnyType:$src,
```

To

```
  Arguments<(ins AnyIntegerOrFloatOr1DVector:$old,
                 AnyIntegerOrFloatOr1DVector:$src,
```

https://github.com/llvm/llvm-project/pull/178887