[Mlir-commits] [mlir] [MLIR][Arith] Ensure ConstantOp validates signless integers for vectors (PR #177857)

[Jakub Kuderski]

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@@ -0,0 +1,12 @@
+// RUN: mlir-opt -convert-scf-to-spirv %s | FileCheck %s
+
+// CHECK-LABEL:   spirv.func @main() "None" {
+// CHECK:           %[[VAL_0:.*]] = spirv.Constant -5 : si32
+// CHECK:           %[[FROM_ELEMENTS_0:.*]] = vector.from_elements %[[VAL_0]] : vector<1xsi32>
+// CHECK:           spirv.Return
+func.func @main() {
+  %2 = spirv.Constant -5 : si32
+  %3 = vector.from_elements %2 : vector<1xsi32>
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kuhar wrote:

it would be created by a from_elements folder

https://github.com/llvm/llvm-project/pull/177857