[Mlir-commits] [mlir] [MLIR][Arith] Ensure ConstantOp validates signless integers for vectors (PR #177857)

[Miloš Poletanović]

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@@ -0,0 +1,14 @@
+// RUN: mlir-opt -convert-scf-to-spirv %s -o - | FileCheck %s
+// NOTE: Assertions have been autogenerated by utils/generate-test-checks.py
+
+// CHECK-LABEL:   spirv.func @main() "None" {
+// CHECK:           %[[VAL_0:.*]] = spirv.Constant -5 : si32
+// CHECK:           %[[FROM_ELEMENTS_0:.*]] = vector.from_elements %[[VAL_0]] : vector<1xsi32>
+// CHECK:           spirv.Return
+// CHECK:         }
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milos1397 wrote:

Done.

https://github.com/llvm/llvm-project/pull/177857