[Mlir-commits] [mlir] [MLIR][Arith] Ensure ConstantOp validates signless integers for vectors (PR #177857)
Miloš Poletanović
llvmlistbot at llvm.org
Mon Jan 26 01:56:51 PST 2026
https://github.com/milos1397 updated https://github.com/llvm/llvm-project/pull/177857
>From b26e1ca0d76fe3fec6ddc70168867288ad1d5b55 Mon Sep 17 00:00:00 2001
From: Milos Poletanovic <mpoletanovic at syrmia.com>
Date: Sun, 25 Jan 2026 14:30:56 +0100
Subject: [PATCH 1/4] [MLIR][Arith] Ensure ConstantOp validates signless
integers for vectors
---
mlir/lib/Dialect/Arith/IR/ArithOps.cpp | 8 ++++---
.../Conversion/SCFToSPIRV/signed-vector.mlir | 23 +++++++++++++++++++
2 files changed, 28 insertions(+), 3 deletions(-)
create mode 100644 mlir/test/Conversion/SCFToSPIRV/signed-vector.mlir
diff --git a/mlir/lib/Dialect/Arith/IR/ArithOps.cpp b/mlir/lib/Dialect/Arith/IR/ArithOps.cpp
index 565a537616971..9bc1be7b2e9f1 100644
--- a/mlir/lib/Dialect/Arith/IR/ArithOps.cpp
+++ b/mlir/lib/Dialect/Arith/IR/ArithOps.cpp
@@ -232,9 +232,11 @@ bool arith::ConstantOp::isBuildableWith(Attribute value, Type type) {
if (!typedAttr || typedAttr.getType() != type)
return false;
// Integer values must be signless.
- if (llvm::isa<IntegerType>(type) &&
- !llvm::cast<IntegerType>(type).isSignless())
- return false;
+ auto elemType = getElementTypeOrSelf(type);
+ if (auto intType = dyn_cast<IntegerType>(elemType)) {
+ if (!intType.isSignless())
+ return false;
+ }
// Integer, float, and element attributes are buildable.
return llvm::isa<IntegerAttr, FloatAttr, ElementsAttr>(value);
}
diff --git a/mlir/test/Conversion/SCFToSPIRV/signed-vector.mlir b/mlir/test/Conversion/SCFToSPIRV/signed-vector.mlir
new file mode 100644
index 0000000000000..7a220e61a56f4
--- /dev/null
+++ b/mlir/test/Conversion/SCFToSPIRV/signed-vector.mlir
@@ -0,0 +1,23 @@
+// NOTE: Assertions have been autogenerated by utils/generate-test-checks.py
+
+// This script is intended to make adding checks to a test case quick and easy.
+// It is *not* authoritative about what constitutes a good test. After using the
+// script, be sure to review and refine the generated checks. For example,
+// CHECK lines should be minimized and named to reflect the test’s intent.
+// For comprehensive guidelines, see:
+// * https://mlir.llvm.org/getting_started/TestingGuide/
+
+module {
+// CHECK-LABEL: spirv.func @main() "None" {
+// CHECK: %[[THREAD_ID_0:.*]] = gpu.thread_id x
+// CHECK: %[[VAL_0:.*]] = spirv.Constant -5 : si32
+// CHECK: %[[FROM_ELEMENTS_0:.*]] = vector.from_elements %[[VAL_0]] : vector<1xsi32>
+// CHECK: spirv.Return
+// CHECK: }
+ func.func @main() {
+ %0 = gpu.thread_id x
+ %2 = spirv.Constant -5 : si32
+ %3 = vector.from_elements %2 : vector<1xsi32>
+ return
+ }
+}
\ No newline at end of file
>From 1aa56ccf5bdc441b4435b9fbe9b825eaa743a2fc Mon Sep 17 00:00:00 2001
From: Milos Poletanovic <mpoletanovic at syrmia.com>
Date: Sun, 25 Jan 2026 15:30:11 +0100
Subject: [PATCH 2/4] Added RUN command in the test.
---
mlir/test/Conversion/SCFToSPIRV/signed-vector.mlir | 1 +
1 file changed, 1 insertion(+)
diff --git a/mlir/test/Conversion/SCFToSPIRV/signed-vector.mlir b/mlir/test/Conversion/SCFToSPIRV/signed-vector.mlir
index 7a220e61a56f4..18f43060967dc 100644
--- a/mlir/test/Conversion/SCFToSPIRV/signed-vector.mlir
+++ b/mlir/test/Conversion/SCFToSPIRV/signed-vector.mlir
@@ -1,3 +1,4 @@
+// RUN: mlir-opt -convert-scf-to-spirv %s -o - | FileCheck %s
// NOTE: Assertions have been autogenerated by utils/generate-test-checks.py
// This script is intended to make adding checks to a test case quick and easy.
>From b2bfccba741c91f033f4492914e728460c5ab13d Mon Sep 17 00:00:00 2001
From: Milos Poletanovic <mpoletanovic at syrmia.com>
Date: Sun, 25 Jan 2026 20:35:14 +0100
Subject: [PATCH 3/4] Addressed comments.
---
mlir/lib/Dialect/Arith/IR/ArithOps.cpp | 3 +--
.../Conversion/SCFToSPIRV/signed-vector.mlir | 22 +++++--------------
2 files changed, 7 insertions(+), 18 deletions(-)
diff --git a/mlir/lib/Dialect/Arith/IR/ArithOps.cpp b/mlir/lib/Dialect/Arith/IR/ArithOps.cpp
index 9bc1be7b2e9f1..8f82666506c06 100644
--- a/mlir/lib/Dialect/Arith/IR/ArithOps.cpp
+++ b/mlir/lib/Dialect/Arith/IR/ArithOps.cpp
@@ -232,8 +232,7 @@ bool arith::ConstantOp::isBuildableWith(Attribute value, Type type) {
if (!typedAttr || typedAttr.getType() != type)
return false;
// Integer values must be signless.
- auto elemType = getElementTypeOrSelf(type);
- if (auto intType = dyn_cast<IntegerType>(elemType)) {
+ if (auto intType = dyn_cast<IntegerType>(getElementTypeOrSelf(type))) {
if (!intType.isSignless())
return false;
}
diff --git a/mlir/test/Conversion/SCFToSPIRV/signed-vector.mlir b/mlir/test/Conversion/SCFToSPIRV/signed-vector.mlir
index 18f43060967dc..8ce0c9efb6ba0 100644
--- a/mlir/test/Conversion/SCFToSPIRV/signed-vector.mlir
+++ b/mlir/test/Conversion/SCFToSPIRV/signed-vector.mlir
@@ -1,24 +1,14 @@
// RUN: mlir-opt -convert-scf-to-spirv %s -o - | FileCheck %s
// NOTE: Assertions have been autogenerated by utils/generate-test-checks.py
-// This script is intended to make adding checks to a test case quick and easy.
-// It is *not* authoritative about what constitutes a good test. After using the
-// script, be sure to review and refine the generated checks. For example,
-// CHECK lines should be minimized and named to reflect the test’s intent.
-// For comprehensive guidelines, see:
-// * https://mlir.llvm.org/getting_started/TestingGuide/
-
-module {
// CHECK-LABEL: spirv.func @main() "None" {
-// CHECK: %[[THREAD_ID_0:.*]] = gpu.thread_id x
// CHECK: %[[VAL_0:.*]] = spirv.Constant -5 : si32
// CHECK: %[[FROM_ELEMENTS_0:.*]] = vector.from_elements %[[VAL_0]] : vector<1xsi32>
// CHECK: spirv.Return
// CHECK: }
- func.func @main() {
- %0 = gpu.thread_id x
- %2 = spirv.Constant -5 : si32
- %3 = vector.from_elements %2 : vector<1xsi32>
- return
- }
-}
\ No newline at end of file
+func.func @main() {
+ %2 = spirv.Constant -5 : si32
+ %3 = vector.from_elements %2 : vector<1xsi32>
+ return
+}
+
>From ad648838e658e9dbe3ff80defb51295f78f763b6 Mon Sep 17 00:00:00 2001
From: Milos Poletanovic <mpoletanovic at syrmia.com>
Date: Mon, 26 Jan 2026 11:17:51 +0100
Subject: [PATCH 4/4] Addressed comments.
---
mlir/test/Conversion/SCFToSPIRV/signed-vector.mlir | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/mlir/test/Conversion/SCFToSPIRV/signed-vector.mlir b/mlir/test/Conversion/SCFToSPIRV/signed-vector.mlir
index 8ce0c9efb6ba0..ebba34d57e36f 100644
--- a/mlir/test/Conversion/SCFToSPIRV/signed-vector.mlir
+++ b/mlir/test/Conversion/SCFToSPIRV/signed-vector.mlir
@@ -1,11 +1,9 @@
-// RUN: mlir-opt -convert-scf-to-spirv %s -o - | FileCheck %s
-// NOTE: Assertions have been autogenerated by utils/generate-test-checks.py
+// RUN: mlir-opt -convert-scf-to-spirv %s | FileCheck %s
// CHECK-LABEL: spirv.func @main() "None" {
// CHECK: %[[VAL_0:.*]] = spirv.Constant -5 : si32
// CHECK: %[[FROM_ELEMENTS_0:.*]] = vector.from_elements %[[VAL_0]] : vector<1xsi32>
// CHECK: spirv.Return
-// CHECK: }
func.func @main() {
%2 = spirv.Constant -5 : si32
%3 = vector.from_elements %2 : vector<1xsi32>
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