[Mlir-commits] [mlir] [mlir][gpu] Add address space modifier to gpu.barrier (PR #177425)

Jianhui Li llvmlistbot at llvm.org
Sat Jan 24 15:04:45 PST 2026


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@@ -181,6 +181,12 @@ module attributes {gpu.container_module} {
       %rotate, %pred4 = gpu.rotate %arg0, 3, 16 : f32
 
       "gpu.barrier"() : () -> ()
+      gpu.barrier
+      gpu.barrier memfence [#gpu.address_space<workgroup>]
+      gpu.barrier memfence [#gpu.address_space<global>]
+      gpu.barrier memfence [#gpu.address_space<global>, #gpu.address_space<workgroup>]
----------------
Jianhui-Li wrote:

Would you consider the attribute format like "attribute=value"? 
      gpu.barrier {memfence=[#gpu.address_space<global>]}
      gpu.barrier {memfence=[#gpu.address_space<global>, #gpu.address_space<workgroup>]}

This is consistent with op attribute in other dialects, like in memref.  
    %0 = memref.alloc()[%s] {alignment = 8} :
      memref<8x64xf32, affine_map<(d0, d1)[s0] -> ((d0 + s0), d1)>, 1> 

XeGPU: 
  %d = xegpu.dpas %a, %b, %c <{
      layout_a = #xegpu.layout<sg_layout = [4, 8], sg_data = [16, 128]>,
      layout_b = #xegpu.layout<sg_layout = [4, 8], sg_data = [128, 16]>,
      layout_cd = #xegpu.layout<sg_layout = [4, 8], sg_data = [16, 16]>}
      : vector<64x128xf16>, vector<128x128xf16>, vector<64x128xf32> -> vector<64x128xf32>

NVGPU:
nvgpu.mma.sp.sync (%a, %b, %c) metadata (%meta) {mmaShape = [16, 8, 32]} :
  (vector<4x2xf16>, vector<2x2xf16>, vector<2x2xf16>) -> vector<2x2xf16>

https://github.com/llvm/llvm-project/pull/177425


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