[Mlir-commits] [mlir] [mlir][NVVM] Add support for tcgen05.ld.red Op (PR #177330)
Durgadoss R
llvmlistbot at llvm.org
Thu Jan 22 02:10:40 PST 2026
================
@@ -5322,6 +5322,111 @@ def NVVM_Tcgen05LdOp : NVVM_Op<"tcgen05.ld", [NVVMRequiresSMa<[100, 101]>]> {
}];
}
+//===----------------------------------------------------------------------===//
+// NVVM tcgen05.ld.red Op
+//===----------------------------------------------------------------------===//
+
+def Tcgen05LdRedMin: I32EnumAttrCase<"MIN", 0, "min">;
+def Tcgen05LdRedMax: I32EnumAttrCase<"MAX", 1, "max">;
+
----------------
durga4github wrote:
I wonder if we should re-use the existing reduction-kind attrs and not add another one.
We can add verifier checks for the invalid-reduction-types.
I think we already have two reduction kinds. One for the Redux.sync and another for TMA reduction.
We can refactor and unify them at some point, but for this patch, we can just use the kind from one of these.
https://github.com/llvm/llvm-project/pull/177330
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