[Mlir-commits] [mlir] [mlir] Fix alignment for predicate (i1) vectors (PR #175975)

[Benjamin Maxwell]

================
@@ -78,7 +78,7 @@ mlir::detail::getDefaultTypeSizeInBits(Type type, const DataLayout &dataLayout,
   if (auto vecType = dyn_cast<VectorType>(type)) {
     uint64_t baseSize = vecType.getNumElements() / vecType.getShape().back() *
                         llvm::PowerOf2Ceil(vecType.getShape().back()) *
-                        dataLayout.getTypeSize(vecType.getElementType()) * 8;
+                        dataLayout.getTypeSizeInBits(vecType.getElementType());
----------------
MacDue wrote:

This seems correct for SVE. However, I'm not sure it's generally correct for this interface given the comment above:
```
// We also assume there is no bit-packing at the moment element sizes are taken in bytes and multiplied with 8 bits.
// TODO: make this extensible.
```

However, I can't really comment further here as I've not worked with MLIR's data layout before. 

https://github.com/llvm/llvm-project/pull/175975