[Mlir-commits] [mlir] [MLIR][XeGPU] Add uArch limitation to scatter load store (PR #172845)

[Artem Kroviakov]

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@@ -153,3 +153,47 @@ func.func @scatter_ops_chunksize(%src: memref<256xf16>) {
   return
 }
 }
+
+// -----
+
+gpu.module @test {
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akroviakov wrote:

Added the first example.

The second case is not entirely clear from the propagation perspective. The propagation of the broadcast with dim mismatch wraps the result layout with a slice where the dim diff is specified as _leading_ dim indices.

And just as a note, the [8, 16] inst data is not suited for pvc.
 

https://github.com/llvm/llvm-project/pull/172845