[Mlir-commits] [mlir] [WIP][AMDGPU] Added support for Sparce WMMA ops (PR #183360)

llvmlistbot at llvm.org llvmlistbot at llvm.org
Wed Feb 25 13:54:08 PST 2026


================
@@ -1149,6 +1149,101 @@ def AMDGPU_SparseMFMAOp :
   let hasVerifier = 1;
 }
 
+// sparse_wmma (swmmac)
+def SWMMACSparseInTypes : AnyTypeOf<[
+    VectorOfLengthAndType<[4, 8, 16], [F16]>,
----------------
RattataKing wrote:

I dont think gfx1250 swmmac support wave64, I might be wrong, I think max sparse input length for F16 should be 8, and same for other types, e.g. max length for I8 is 16.

https://github.com/llvm/llvm-project/pull/183360


More information about the Mlir-commits mailing list