[Mlir-commits] [llvm] [mlir] [mlir][x86] Rename x86vector to x86 (PR #183311)
llvmlistbot at llvm.org
llvmlistbot at llvm.org
Wed Feb 25 07:04:51 PST 2026
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-mlir-vector
Author: Adam Siemieniuk (adam-smnk)
<details>
<summary>Changes</summary>
Renames 'x86vector' dialect to 'x86'.
This is the first PR in series of cleanups around dialects targeting x86 platforms.
The new naming scheme is shorter, cleaner, and opens possibility of integrating other x86-specific operations not strictly fitting pure vector representation. For example, the generalization will allow for future merger of AMX dialect into the x86 dialect to create one-stop x86 operations collection and boost discoverability.
---
Patch is 262.13 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/183311.diff
83 Files Affected:
- (modified) mlir/Maintainers.md (+1-1)
- (modified) mlir/docs/TargetLLVMIR.md (+1-1)
- (renamed) mlir/include/mlir-c/Dialect/X86.h (+5-5)
- (modified) mlir/include/mlir/Conversion/Passes.td (+38-43)
- (modified) mlir/include/mlir/Dialect/CMakeLists.txt (+1-1)
- (modified) mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h (+1-1)
- (modified) mlir/include/mlir/Dialect/SparseTensor/Pipelines/Passes.h (+4-4)
- (added) mlir/include/mlir/Dialect/X86/CMakeLists.txt (+7)
- (added) mlir/include/mlir/Dialect/X86/TransformOps/CMakeLists.txt (+4)
- (renamed) mlir/include/mlir/Dialect/X86/TransformOps/X86TransformOps.h (+8-8)
- (renamed) mlir/include/mlir/Dialect/X86/TransformOps/X86TransformOps.td (+22-23)
- (renamed) mlir/include/mlir/Dialect/X86/Transforms.h (+11-11)
- (renamed) mlir/include/mlir/Dialect/X86/Utils/X86Utils.h (+6-6)
- (renamed) mlir/include/mlir/Dialect/X86/X86.td (+153-178)
- (renamed) mlir/include/mlir/Dialect/X86/X86Dialect.h (+8-8)
- (renamed) mlir/include/mlir/Dialect/X86/X86Interfaces.td (+6-6)
- (removed) mlir/include/mlir/Dialect/X86Vector/CMakeLists.txt (-7)
- (removed) mlir/include/mlir/Dialect/X86Vector/TransformOps/CMakeLists.txt (-4)
- (modified) mlir/lib/CAPI/Dialect/CMakeLists.txt (+3-3)
- (renamed) mlir/lib/CAPI/Dialect/X86.cpp (+4-5)
- (modified) mlir/lib/Conversion/VectorToLLVM/CMakeLists.txt (+2-2)
- (modified) mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.cpp (+7-7)
- (modified) mlir/lib/Dialect/CMakeLists.txt (+1-1)
- (modified) mlir/lib/Dialect/Math/Transforms/CMakeLists.txt (+1-1)
- (modified) mlir/lib/Dialect/Math/Transforms/PolynomialApproximation.cpp (+2-2)
- (modified) mlir/lib/Dialect/Vector/TransformOps/CMakeLists.txt (+1-1)
- (modified) mlir/lib/Dialect/Vector/TransformOps/VectorTransformOps.cpp (+5-7)
- (renamed) mlir/lib/Dialect/X86/CMakeLists.txt ()
- (renamed) mlir/lib/Dialect/X86/IR/CMakeLists.txt (+4-4)
- (renamed) mlir/lib/Dialect/X86/IR/X86Dialect.cpp (+16-16)
- (renamed) mlir/lib/Dialect/X86/TransformOps/CMakeLists.txt (+5-5)
- (renamed) mlir/lib/Dialect/X86/TransformOps/X86TransformOps.cpp (+19-21)
- (renamed) mlir/lib/Dialect/X86/Transforms/AVXTranspose.cpp (+24-24)
- (renamed) mlir/lib/Dialect/X86/Transforms/CMakeLists.txt (+3-3)
- (renamed) mlir/lib/Dialect/X86/Transforms/LegalizeForLLVMExport.cpp (+10-11)
- (renamed) mlir/lib/Dialect/X86/Transforms/ShuffleVectorFMAOps.cpp (+30-32)
- (renamed) mlir/lib/Dialect/X86/Transforms/SinkVectorProducerOps.cpp (+4-5)
- (renamed) mlir/lib/Dialect/X86/Transforms/VectorContractBF16ToFMA.cpp (+22-24)
- (renamed) mlir/lib/Dialect/X86/Transforms/VectorContractToFMA.cpp (+4-5)
- (renamed) mlir/lib/Dialect/X86/Transforms/VectorContractToPackedTypeDotProduct.cpp (+11-11)
- (renamed) mlir/lib/Dialect/X86/Utils/CMakeLists.txt (+3-3)
- (renamed) mlir/lib/Dialect/X86/Utils/X86Utils.cpp (+4-4)
- (modified) mlir/lib/RegisterAllDialects.cpp (+2-2)
- (modified) mlir/lib/RegisterAllExtensions.cpp (+2-2)
- (modified) mlir/python/CMakeLists.txt (+6-6)
- (renamed) mlir/python/mlir/dialects/X86.td (+5-5)
- (renamed) mlir/python/mlir/dialects/X86TransformOps.td (+5-5)
- (renamed) mlir/python/mlir/dialects/transform/x86.py (+1-1)
- (renamed) mlir/python/mlir/dialects/x86.py (+2-2)
- (modified) mlir/test/CMakeLists.txt (+2-2)
- (modified) mlir/test/Conversion/VectorToLLVM/pass-option-serialization.mlir (+1-1)
- (modified) mlir/test/Dialect/Math/polynomial-approximation.mlir (+9-9)
- (modified) mlir/test/Dialect/Vector/CPU/X86/vector-transpose-lowering.mlir (+1-1)
- (renamed) mlir/test/Dialect/X86/cvt-packed-f32-to-bf16.mlir (+3-3)
- (renamed) mlir/test/Dialect/X86/dot-bf16.mlir (+4-4)
- (renamed) mlir/test/Dialect/X86/legalize-for-llvm.mlir (+32-32)
- (renamed) mlir/test/Dialect/X86/roundtrip.mlir (+62-62)
- (renamed) mlir/test/Dialect/X86/shuffle-vector-fmas.mlir (+90-90)
- (renamed) mlir/test/Dialect/X86/sink-vector-producer-ops.mlir (+6-7)
- (renamed) mlir/test/Dialect/X86/vector-contract-bf16-to-fma.mlir (+80-81)
- (renamed) mlir/test/Dialect/X86/vector-contract-to-fma.mlir (+10-10)
- (renamed) mlir/test/Dialect/X86/vector-contract-to-packed-type-dotproduct.mlir (+64-64)
- (renamed) mlir/test/Integration/Dialect/Vector/CPU/X86/dot.mlir (+2-2)
- (renamed) mlir/test/Integration/Dialect/Vector/CPU/X86/inline-asm-vector-avx512.mlir ()
- (renamed) mlir/test/Integration/Dialect/Vector/CPU/X86/lit.local.cfg (+2-2)
- (renamed) mlir/test/Integration/Dialect/Vector/CPU/X86/mask-compress.mlir (+4-4)
- (renamed) mlir/test/Integration/Dialect/Vector/CPU/X86/rsqrt.mlir (+2-2)
- (renamed) mlir/test/Integration/Dialect/Vector/CPU/X86/sparse-dot-product.mlir (+4-4)
- (renamed) mlir/test/Integration/Dialect/Vector/CPU/X86/vp2intersect-i32.mlir (+2-2)
- (renamed) mlir/test/Target/LLVMIR/x86.mlir (+30-30)
- (modified) mlir/test/lib/Dialect/Math/CMakeLists.txt (+1-1)
- (modified) mlir/test/lib/Dialect/Math/TestPolynomialApproximation.cpp (+3-3)
- (modified) mlir/test/lib/Dialect/Vector/CMakeLists.txt (+1-1)
- (modified) mlir/test/lit.site.cfg.py.in (+1-1)
- (modified) mlir/test/mlir-opt/commandline.mlir (+1-1)
- (added) mlir/test/mlir-runner/X86/lit.local.cfg (+5)
- (renamed) mlir/test/mlir-runner/X86/math-polynomial-approx-avx2.mlir (+1-1)
- (removed) mlir/test/mlir-runner/X86Vector/lit.local.cfg (-5)
- (renamed) mlir/test/python/dialects/transform_x86_ext.py (+11-11)
- (renamed) mlir/test/python/dialects/x86.py (+7-7)
- (modified) utils/bazel/llvm-project-overlay/mlir/BUILD.bazel (+57-57)
- (modified) utils/bazel/llvm-project-overlay/mlir/python/BUILD.bazel (+15-15)
- (modified) utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel (+3-3)
``````````diff
diff --git a/mlir/Maintainers.md b/mlir/Maintainers.md
index b495d25426a44..a023ee0ea1bba 100644
--- a/mlir/Maintainers.md
+++ b/mlir/Maintainers.md
@@ -105,7 +105,7 @@ available, should be contacted first, as they're more active in those areas.
* ‘arm_sve’ Dialect ([@banach-space](https://github.com/banach-space))
* ‘ArmSME’ Dialect ([@banach-space](https://github.com/banach-space))
* ‘amx’ Dialect ([@adam-smnk](https://github.com/adam-smnk))
-* ‘x86vector’ Dialect ([@adam-smnk](https://github.com/adam-smnk))
+* ‘x86’ Dialect ([@adam-smnk](https://github.com/adam-smnk))
* ‘vcix’ Dialect ([@mshockwave](https://github.com/mshockwave))
#### Paradigm Dialects
diff --git a/mlir/docs/TargetLLVMIR.md b/mlir/docs/TargetLLVMIR.md
index 3a2f44f46f782..2bdf400a7759f 100644
--- a/mlir/docs/TargetLLVMIR.md
+++ b/mlir/docs/TargetLLVMIR.md
@@ -6,7 +6,7 @@ overall flow is two-stage:
1. **conversion** of the IR to a set of dialects translatable to LLVM IR, for
example [LLVM Dialect](Dialects/LLVM.md) or one of the hardware-specific
dialects derived from LLVM IR intrinsics such as [AMX](Dialects/AMX.md),
- [X86Vector](Dialects/X86Vector.md) or [ArmNeon](Dialects/ArmNeon.md);
+ [X86](Dialects/X86.md) or [ArmNeon](Dialects/ArmNeon.md);
2. **translation** of MLIR dialects to LLVM IR.
This flow allows the non-trivial transformation to be performed within MLIR
diff --git a/mlir/include/mlir-c/Dialect/X86Vector.h b/mlir/include/mlir-c/Dialect/X86.h
similarity index 60%
rename from mlir/include/mlir-c/Dialect/X86Vector.h
rename to mlir/include/mlir-c/Dialect/X86.h
index 673870e32162d..6973fba33ebd6 100644
--- a/mlir/include/mlir-c/Dialect/X86Vector.h
+++ b/mlir/include/mlir-c/Dialect/X86.h
@@ -1,4 +1,4 @@
-//===-- mlir-c/Dialect/x86Vector.h - C API for x86Vector Dialect --*- C -*-===//
+//===-- mlir-c/Dialect/x86.h - C API for x86 Dialect --------------*- C -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM
// Exceptions.
@@ -7,8 +7,8 @@
//
//===----------------------------------------------------------------------===//
-#ifndef MLIR_C_DIALECT_X86VECTOR_H
-#define MLIR_C_DIALECT_X86VECTOR_H
+#ifndef MLIR_C_DIALECT_X86_H
+#define MLIR_C_DIALECT_X86_H
#include "mlir-c/IR.h"
@@ -16,10 +16,10 @@
extern "C" {
#endif
-MLIR_DECLARE_CAPI_DIALECT_REGISTRATION(X86Vector, x86vector);
+MLIR_DECLARE_CAPI_DIALECT_REGISTRATION(X86, x86);
#ifdef __cplusplus
}
#endif
-#endif // MLIR_C_DIALECT_X86VECTOR_H
+#endif // MLIR_C_DIALECT_X86_H
diff --git a/mlir/include/mlir/Conversion/Passes.td b/mlir/include/mlir/Conversion/Passes.td
index 37a8bf2f45d72..dbb678318e754 100644
--- a/mlir/include/mlir/Conversion/Passes.td
+++ b/mlir/include/mlir/Conversion/Passes.td
@@ -1521,22 +1521,23 @@ def ConvertVectorToLLVMPass : Pass<"convert-vector-to-llvm"> {
operations. The lowering pass provides several options to control
the kinds of optimizations that are allowed. It also provides options
that enable the use of one or more architectural-specific dialects
- (AMX, X86Vector, ArmNeon, ArmSVE, etc.) in combination with the
+ (AMX, X86, ArmNeon, ArmSVE, etc.) in combination with the
architectural-neutral vector dialect lowering.
}];
// Override explicitly in C++ to allow conditional dialect dependence.
// let dependentDialects;
- let options = [
- Option<"reassociateFPReductions", "reassociate-fp-reductions",
- "bool", /*default=*/"false",
- "Allows llvm to reassociate floating-point reductions for speed">,
- Option<"force32BitVectorIndices", "force-32bit-vector-indices",
- "bool", /*default=*/"true",
- "Allows compiler to assume vector indices fit in 32-bit if that "
- "yields faster code">,
- Option<"useVectorAlignment", "use-vector-alignment",
- "bool", /*default=*/"false",
+ let options =
+ [Option<"reassociateFPReductions", "reassociate-fp-reductions", "bool",
+ /*default=*/"false",
+ "Allows llvm to reassociate floating-point reductions for speed">,
+ Option<"force32BitVectorIndices", "force-32bit-vector-indices", "bool",
+ /*default=*/"true",
+ "Allows compiler to assume vector indices fit in 32-bit if that "
+ "yields faster code">,
+ Option<
+ "useVectorAlignment", "use-vector-alignment", "bool",
+ /*default=*/"false",
"Use the preferred alignment of a vector type in load/store "
"operations instead of the alignment of the element type of the "
"memref. This flag is intended for use with hardware which requires"
@@ -1544,34 +1545,28 @@ def ConvertVectorToLLVMPass : Pass<"convert-vector-to-llvm"> {
"vector access are naturally aligned. If operations have an "
"alignment attribute set, the alignment attribute takes priority "
"over this option ">,
- Option<"amx", "enable-amx",
- "bool", /*default=*/"false",
- "Enables the use of AMX dialect while lowering the vector "
- "dialect.">,
- Option<"armNeon", "enable-arm-neon",
- "bool", /*default=*/"false",
- "Enables the use of ArmNeon dialect while lowering the vector "
- "dialect.">,
- Option<"armSVE", "enable-arm-sve",
- "bool", /*default=*/"false",
- "Enables the use of ArmSVE dialect while lowering the vector "
- "dialect.">,
- Option<"armI8MM", "enable-arm-i8mm",
- "bool", /*default=*/"false",
- "Enables the use of Arm FEAT_I8MM instructions while lowering "
- "the vector dialect.">,
- Option<"armBF16", "enable-arm-bf16",
- "bool", /*default=*/"false",
- "Enables the use of Arm FEAT_BF16 instructions while lowering "
- "the vector dialect.">,
- Option<"x86Vector", "enable-x86vector",
- "bool", /*default=*/"false",
- "Enables the use of X86Vector dialect while lowering the vector "
- "dialect.">,
- Option<"vectorContractLowering", "vector-contract-lowering",
- "vector::VectorContractLowering",
- /*default=*/"vector::VectorContractLowering::Dot",
- VectorContractLoweringAttr.summary, [{::llvm::cl::values(
+ Option<"amx", "enable-amx", "bool", /*default=*/"false",
+ "Enables the use of AMX dialect while lowering the vector "
+ "dialect.">,
+ Option<"armNeon", "enable-arm-neon", "bool", /*default=*/"false",
+ "Enables the use of ArmNeon dialect while lowering the vector "
+ "dialect.">,
+ Option<"armSVE", "enable-arm-sve", "bool", /*default=*/"false",
+ "Enables the use of ArmSVE dialect while lowering the vector "
+ "dialect.">,
+ Option<"armI8MM", "enable-arm-i8mm", "bool", /*default=*/"false",
+ "Enables the use of Arm FEAT_I8MM instructions while lowering "
+ "the vector dialect.">,
+ Option<"armBF16", "enable-arm-bf16", "bool", /*default=*/"false",
+ "Enables the use of Arm FEAT_BF16 instructions while lowering "
+ "the vector dialect.">,
+ Option<"x86", "enable-x86", "bool", /*default=*/"false",
+ "Enables the use of X86 dialect while lowering the vector "
+ "dialect.">,
+ Option<"vectorContractLowering", "vector-contract-lowering",
+ "vector::VectorContractLowering",
+ /*default=*/"vector::VectorContractLowering::Dot",
+ VectorContractLoweringAttr.summary, [{::llvm::cl::values(
clEnumValN(::mlir::vector::VectorContractLowering::Dot, "dot",
"Progressively lower to finer grained `vector.contract` and dot-products. (default)"),
clEnumValN(::mlir::vector::VectorContractLowering::LLVMIntr, "llvmintr",
@@ -1581,10 +1576,10 @@ def ConvertVectorToLLVMPass : Pass<"convert-vector-to-llvm"> {
clEnumValN(::mlir::vector::VectorContractLowering::ParallelArith, "parallelarith",
"Lower contract with all reduction dimensions unrolled to 1 to a vector elementwise operations.")
)}]>,
- Option<"vectorTransposeLowering", "vector-transpose-lowering",
- "vector::VectorTransposeLowering",
- /*default=*/"vector::VectorTransposeLowering::EltWise",
- VectorTransposeLoweringAttr.summary, [{::llvm::cl::values(
+ Option<"vectorTransposeLowering", "vector-transpose-lowering",
+ "vector::VectorTransposeLowering",
+ /*default=*/"vector::VectorTransposeLowering::EltWise",
+ VectorTransposeLoweringAttr.summary, [{::llvm::cl::values(
clEnumValN(::mlir::vector::VectorTransposeLowering::EltWise, "eltwise",
"Lower transpose into element-wise extract and inserts (default)"),
clEnumValN(::mlir::vector::VectorTransposeLowering::LLVMIntr, "llvmintr",
diff --git a/mlir/include/mlir/Dialect/CMakeLists.txt b/mlir/include/mlir/Dialect/CMakeLists.txt
index e870d5ad23376..ae9a18046c101 100644
--- a/mlir/include/mlir/Dialect/CMakeLists.txt
+++ b/mlir/include/mlir/Dialect/CMakeLists.txt
@@ -42,5 +42,5 @@ add_subdirectory(UB)
add_subdirectory(Utils)
add_subdirectory(Vector)
add_subdirectory(WasmSSA)
-add_subdirectory(X86Vector)
+add_subdirectory(X86)
add_subdirectory(XeGPU)
diff --git a/mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h b/mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
index deb84d556ae0a..d1f313098a2c1 100644
--- a/mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
+++ b/mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
@@ -19,7 +19,7 @@
#include "mlir/Dialect/Tensor/IR/Tensor.h"
#include "mlir/Dialect/Utils/StaticValueUtils.h"
#include "mlir/Dialect/Vector/Transforms/VectorTransforms.h"
-#include "mlir/Dialect/X86Vector/Transforms.h"
+#include "mlir/Dialect/X86/Transforms.h"
#include "mlir/IR/OpDefinition.h"
#include "mlir/IR/PatternMatch.h"
#include "mlir/Interfaces/TilingInterface.h"
diff --git a/mlir/include/mlir/Dialect/SparseTensor/Pipelines/Passes.h b/mlir/include/mlir/Dialect/SparseTensor/Pipelines/Passes.h
index efbe5c56a219b..6d1d630056627 100644
--- a/mlir/include/mlir/Dialect/SparseTensor/Pipelines/Passes.h
+++ b/mlir/include/mlir/Dialect/SparseTensor/Pipelines/Passes.h
@@ -118,9 +118,9 @@ struct SparsifierOptions : public PassPipelineOptions<SparsifierOptions> {
desc("Enables the use of ArmSVE dialect while lowering the vector "
"dialect"),
init(false)};
- PassOptions::Option<bool> x86Vector{
- *this, "enable-x86vector",
- desc("Enables the use of X86Vector dialect while lowering the vector "
+ PassOptions::Option<bool> x86{
+ *this, "enable-x86",
+ desc("Enables the use of X86 dialect while lowering the vector "
"dialect"),
init(false)};
@@ -169,7 +169,7 @@ struct SparsifierOptions : public PassPipelineOptions<SparsifierOptions> {
opts.armNeon = armNeon;
opts.armSVE = armSVE;
opts.amx = amx;
- opts.x86Vector = x86Vector;
+ opts.x86 = x86;
return opts;
}
};
diff --git a/mlir/include/mlir/Dialect/X86/CMakeLists.txt b/mlir/include/mlir/Dialect/X86/CMakeLists.txt
new file mode 100644
index 0000000000000..190573e043b17
--- /dev/null
+++ b/mlir/include/mlir/Dialect/X86/CMakeLists.txt
@@ -0,0 +1,7 @@
+add_mlir_dialect(X86 x86)
+add_mlir_doc(X86 X86 Dialects/ -gen-dialect-doc -dialect=x86)
+
+add_mlir_interface(X86Interfaces)
+add_dependencies(MLIRX86IncGen MLIRX86InterfacesIncGen)
+
+add_subdirectory(TransformOps)
diff --git a/mlir/include/mlir/Dialect/X86/TransformOps/CMakeLists.txt b/mlir/include/mlir/Dialect/X86/TransformOps/CMakeLists.txt
new file mode 100644
index 0000000000000..d21bc07060d77
--- /dev/null
+++ b/mlir/include/mlir/Dialect/X86/TransformOps/CMakeLists.txt
@@ -0,0 +1,4 @@
+set(LLVM_TARGET_DEFINITIONS X86TransformOps.td)
+mlir_tablegen(X86TransformOps.h.inc -gen-op-decls)
+mlir_tablegen(X86TransformOps.cpp.inc -gen-op-defs)
+add_mlir_dialect_tablegen_target(MLIRX86TransformOpsIncGen)
diff --git a/mlir/include/mlir/Dialect/X86Vector/TransformOps/X86VectorTransformOps.h b/mlir/include/mlir/Dialect/X86/TransformOps/X86TransformOps.h
similarity index 63%
rename from mlir/include/mlir/Dialect/X86Vector/TransformOps/X86VectorTransformOps.h
rename to mlir/include/mlir/Dialect/X86/TransformOps/X86TransformOps.h
index e1d8b8762e799..4d0031f6cf691 100644
--- a/mlir/include/mlir/Dialect/X86Vector/TransformOps/X86VectorTransformOps.h
+++ b/mlir/include/mlir/Dialect/X86/TransformOps/X86TransformOps.h
@@ -1,4 +1,4 @@
-//===- X86VectorTransformOps.h - X86Vector transform ops --------*- C++ -*-===//
+//===- X86TransformOps.h - X86 transform ops --------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
@@ -6,26 +6,26 @@
//
//===----------------------------------------------------------------------===//
-#ifndef MLIR_DIALECT_X86VECTOR_TRANSFORMOPS_X86VECTORTRANSFORMOPS_H
-#define MLIR_DIALECT_X86VECTOR_TRANSFORMOPS_X86VECTORTRANSFORMOPS_H
+#ifndef MLIR_DIALECT_X86_TRANSFORMOPS_X86TRANSFORMOPS_H
+#define MLIR_DIALECT_X86_TRANSFORMOPS_X86TRANSFORMOPS_H
#include "mlir/Dialect/Transform/Interfaces/TransformInterfaces.h"
#include "mlir/IR/OpImplementation.h"
//===----------------------------------------------------------------------===//
-// X86Vector Transform Operations
+// X86 Transform Operations
//===----------------------------------------------------------------------===//
#define GET_OP_CLASSES
-#include "mlir/Dialect/X86Vector/TransformOps/X86VectorTransformOps.h.inc"
+#include "mlir/Dialect/X86/TransformOps/X86TransformOps.h.inc"
namespace mlir {
class DialectRegistry;
-namespace x86vector {
+namespace x86 {
void registerTransformDialectExtension(DialectRegistry ®istry);
-} // namespace x86vector
+} // namespace x86
} // namespace mlir
-#endif // MLIR_DIALECT_X86VECTOR_TRANSFORMOPS_X86VECTORTRANSFORMOPS_H
+#endif // MLIR_DIALECT_X86_TRANSFORMOPS_X86TRANSFORMOPS_H
diff --git a/mlir/include/mlir/Dialect/X86Vector/TransformOps/X86VectorTransformOps.td b/mlir/include/mlir/Dialect/X86/TransformOps/X86TransformOps.td
similarity index 55%
rename from mlir/include/mlir/Dialect/X86Vector/TransformOps/X86VectorTransformOps.td
rename to mlir/include/mlir/Dialect/X86/TransformOps/X86TransformOps.td
index 891829fca017f..102ac4d83b4f3 100644
--- a/mlir/include/mlir/Dialect/X86Vector/TransformOps/X86VectorTransformOps.td
+++ b/mlir/include/mlir/Dialect/X86/TransformOps/X86TransformOps.td
@@ -1,4 +1,4 @@
-//===- X86VectorTransformOps.td - X86Vector transform ops --*- tablegen -*-===//
+//===- X86TransformOps.td - X86 transform ops --------------*- tablegen -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
@@ -6,8 +6,8 @@
//
//===----------------------------------------------------------------------===//
-#ifndef X86VECTOR_TRANSFORM_OPS
-#define X86VECTOR_TRANSFORM_OPS
+#ifndef X86_TRANSFORM_OPS
+#define X86_TRANSFORM_OPS
include "mlir/Dialect/Transform/IR/TransformDialect.td"
include "mlir/Dialect/Transform/Interfaces/TransformInterfaces.td"
@@ -17,19 +17,20 @@ include "mlir/Dialect/Transform/IR/TransformAttrs.td"
include "mlir/Dialect/Transform/IR/TransformTypes.td"
include "mlir/IR/RegionKindInterface.td"
-def ApplyVectorContractToFMAPatternsOp : Op<Transform_Dialect,
- "apply_patterns.x86vector.vector_contract_to_fma",
- [DeclareOpInterfaceMethods<PatternDescriptorOpInterface>]> {
+def ApplyVectorContractToFMAPatternsOp
+ : Op<Transform_Dialect, "apply_patterns.x86.vector_contract_to_fma",
+ [DeclareOpInterfaceMethods<PatternDescriptorOpInterface>]> {
let description = [{
Collect patterns to lower a F32 type vector.contract operation to a FMA.
}];
-
+
let assemblyFormat = "attr-dict";
}
-def ApplyVectorContractToPackedTypeDotProductPatternsOp : Op<Transform_Dialect,
- "apply_patterns.x86vector.vector_contract_to_packed_type_dot_product",
- [DeclareOpInterfaceMethods<PatternDescriptorOpInterface>]> {
+def ApplyVectorContractToPackedTypeDotProductPatternsOp
+ : Op<Transform_Dialect,
+ "apply_patterns.x86.vector_contract_to_packed_type_dot_product",
+ [DeclareOpInterfaceMethods<PatternDescriptorOpInterface>]> {
let description = [{
Collect patterns to lower a BF16/Int8 type vector.contract operation
to a BF16/Int8 dot-product.
@@ -38,9 +39,9 @@ def ApplyVectorContractToPackedTypeDotProductPatternsOp : Op<Transform_Dialect,
let assemblyFormat = "attr-dict";
}
-def ApplyVectorContractBF16ToFMAPatternsOp : Op<Transform_Dialect,
- "apply_patterns.x86vector.vector_contract_bf16_to_fma",
- [DeclareOpInterfaceMethods<PatternDescriptorOpInterface>]> {
+def ApplyVectorContractBF16ToFMAPatternsOp
+ : Op<Transform_Dialect, "apply_patterns.x86.vector_contract_bf16_to_fma",
+ [DeclareOpInterfaceMethods<PatternDescriptorOpInterface>]> {
let description = [{
Collect patterns to lower a BF16 type vector.contract operation
to a FMA via emulation lowering using BF16 packed operations.
@@ -49,9 +50,9 @@ def ApplyVectorContractBF16ToFMAPatternsOp : Op<Transform_Dialect,
let assemblyFormat = "attr-dict";
}
-def ApplySinkVectorProducerOpsPatternsOp : Op<Transform_Dialect,
- "apply_patterns.x86vector.sink_vector_producer_ops",
- [DeclareOpInterfaceMethods<PatternDescriptorOpInterface>]> {
+def ApplySinkVectorProducerOpsPatternsOp
+ : Op<Transform_Dialect, "apply_patterns.x86.sink_vector_producer_ops",
+ [DeclareOpInterfaceMethods<PatternDescriptorOpInterface>]> {
let description = [{
Collect patterns to sink vector producer operations forward in a block to
place them immediately before their first use.
@@ -60,17 +61,15 @@ def ApplySinkVectorProducerOpsPatternsOp : Op<Transform_Dialect,
let assemblyFormat = "attr-dict";
}
-def ApplyShuffleVectorFMAOpsPatternsOp : Op<Transform_Dialect,
- "apply_patterns.x86vector.shuffle_vector_fma_ops",
- [DeclareOpInterfaceMethods<PatternDescriptorOpInterface>]> {
+def ApplyShuffleVectorFMAOpsPatternsOp
+ : Op<Transform_Dialect, "apply_patterns.x86.shuffle_vector_fma_ops",
+ [DeclareOpInterfaceMethods<PatternDescriptorOpInterface>]> {
let description = [{
- Collect patterns to shuffle FMAs with x86vector operations as operands
+ Collect patterns to shuffle FMAs with x86 operations as operands
such that FMAs are grouped with respect to odd/even packed index.
}];
let assemblyFormat = "attr-dict";
}
-
-#endif // X86VECTOR_TRANSFORM_OPS
-
+#endif // X86_TRANSFORM_OPS
diff --git a/mlir/include/mlir/Dialect/X86Vector/Transforms.h b/mlir/include/mlir/Dialect/X86/Transforms.h
similarity index 93%
rename from mlir/include/mlir/Dialect/X86Vector/Transforms.h
rename to mlir/include/mlir/Dialect/X86/Transforms.h
index aadca92708908..7ab3a0b0b5629 100644
--- a/mlir/include/mlir/Dialect/X86Vector/Transforms.h
+++ b/mlir/include/mlir/Dialect/X86/Transforms.h
@@ -1,4 +1,4 @@
-//=- Transforms.h - X86Vector Dialect Transformation Entrypoints -*- C++ -*-=//
+//=- Transforms.h - X86 Dialect Transformation Entrypoints --------*- C++ -*-=//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
@@ -6,8 +6,8 @@
//
//===----------------------------------------------------------------------===//
-#ifndef MLIR_DIALECT_X86VECTOR_TRANSFORMS_H
-#define MLIR_DIALECT_X86VECTOR_TRANSFORMS_H
+#ifndef MLIR_DIALECT_X86_TRANSFORMS_H
+#define MLIR_DIALECT_X86_TRANSFORMS_H
#include "mlir/IR/Value.h"
@@ -18,7 +18,7 @@ class LLVMConversionTarget;
class LLVMTypeConverter;
class RewritePatternSet;
-namespace x86vector {
+namespace x86 {
/// Helper class to factor out the creation and extraction of masks from nibs.
struct MaskHelper {
@@ -100,7 +100,7 @@ void populateVectorContractBF16ToFMAPatterns(RewritePatternSet &patterns);
// range by placing them at their earliest legal use site.
void populateSinkVectorProducerOpsPatterns(RewritePatternSet &patterns);
-// Shuffles FMAs with x86vector operations as operands such that FMAs are
+// Shuffles FMAs with x86 operatio...
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/183311
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