[Mlir-commits] [mlir] [mlir][spirv] Add 6 Element Binary operators to TOSA Ext Inst Set (PR #179627)
Jakub Kuderski
llvmlistbot at llvm.org
Tue Feb 24 06:09:05 PST 2026
================
@@ -863,4 +896,219 @@ def SPIRV_TosaTanhOp : SPIRV_TosaOpWithResult<"Tanh", 13, [Pure,
}
+def SPIRV_TosaAddOp : SPIRV_TosaElementwiseBinaryOp<"Add", 14, [Pure]> {
+ let summary = "Addition operator.";
+
+ let description = [{
+ Elementwise Addition of input1 and input2. Axis of size 1 will be broadcast,
+ as necessary. Rank of input tensors must match.
+
+ References:
+ * https://github.khronos.org/SPIRV-Registry/extended/TOSA.001000.1.html#_add
+ * https://www.mlplatform.org/tosa/tosa_spec_1_0_1.html#_add
+
+ #### Example:
+ ```mlir
+ %0 = spirv.Tosa.Add %arg0, %arg1 : !spirv.arm.tensor<4x7x3x10xi32>, !spirv.arm.tensor<4x7x3x1xi32> -> !spirv.arm.tensor<4x7x3x10xi32>
+ %0 = spirv.Tosa.Add %arg0, %arg1 : !spirv.arm.tensor<26x37x18xf16>, !spirv.arm.tensor<1x37x18xf16> -> !spirv.arm.tensor<26x37x18xf16>
+ ```
+ }];
+
+ let arguments = (ins
+ SPIRV_TosaNumerical_TensorArm: $input1,
+ SPIRV_TosaNumerical_TensorArm: $input2
+ );
+
+ let results = (outs
+ SPIRV_TosaNumerical_TensorArm: $output
+ );
+
+ let assemblyFormat = [{
+ $input1 `,`
+ $input2
+ attr-dict `:` type(operands) `->` type(results)
+ }];
+}
+
+
+def SPIRV_TosaArithmeticRightShiftOp : SPIRV_TosaElementwiseBinaryOp<"ArithmeticRightShift", 15, []> {
+ let summary = "Arithmetic Right Shift.";
+
+ let description = [{
+ Elementwise Arithmetic Right Shift of input1 by the amount specified in
+ input2. Axis of size 1 will be broadcast, as necessary. Rank of input tensors
+ must match. The behavior is undefined if the shift value is negative or
+ greater or equal to the bit-width of the element type.
+
+ References:
+ * https://github.khronos.org/SPIRV-Registry/extended/TOSA.001000.1.html#_arithmetic_right_shift
+ * https://www.mlplatform.org/tosa/tosa_spec_1_0_1.html#_arithmetic_right_shift
+
+ #### Example:
+ ```mlir
+ %1 = spirv.Tosa.ArithmeticRightShift round = true, %arg0, %arg1 : !spirv.arm.tensor<1x47x22xi16>, !spirv.arm.tensor<49x47x22xi16> -> !spirv.arm.tensor<49x47x22xi16>
+ ```
+ }];
+
+ let arguments = (ins
+ SPIRV_BoolConstAttr: $round,
+ SPIRV_TosaInteger_TensorArm: $input1,
+ SPIRV_TosaInteger_TensorArm: $input2
+ );
+
+ let results = (outs
+ SPIRV_TosaInteger_TensorArm: $output
+ );
+
+ let assemblyFormat = [{
+ `round` `=` $round `,`
+ $input1 `,`
+ $input2
+ attr-dict `:` type(operands) `->` type(results)
+ }];
+}
+
+
+def SPIRV_TosaBitwiseAndOp : SPIRV_TosaElementwiseBinaryOp<"BitwiseAnd", 16, [Pure]> {
+ let summary = "Bitwise AND operator.";
+
+ let description = [{
+ Elementwise Bitwise AND of input1 and input2. Axis of size 1
+ will be broadcast as necessary. Rank of input tensors must match.
+
+ References:
+ * https://github.khronos.org/SPIRV-Registry/extended/TOSA.001000.1.html#_bitwise_and
+ * https://www.mlplatform.org/tosa/tosa_spec_1_0_1.html#_bitwise_and
+
+ #### Example:
+ ```mlir
+ %0 = spirv.Tosa.BitwiseAnd %arg0, %arg1 : !spirv.arm.tensor<4x1x7x12xi16>, !spirv.arm.tensor<4x13x7x12xi16> -> !spirv.arm.tensor<4x13x7x12xi16>
+ ```
+ }];
+
+ let arguments = (ins
+ SPIRV_TosaInteger_TensorArm: $input1,
+ SPIRV_TosaInteger_TensorArm: $input2
+ );
+
+ let results = (outs
+ SPIRV_TosaInteger_TensorArm: $output
+ );
+
+ let assemblyFormat = [{
+ $input1 `,`
+ $input2
+ attr-dict `:` type(operands) `->` type(results)
+ }];
+}
+
+
+def SPIRV_TosaBitwiseOrOp : SPIRV_TosaElementwiseBinaryOp<"BitwiseOr", 17, [Pure]> {
+ let summary = "Bitwise OR operator.";
+
+ let description = [{
+ Elementwise Bitwise OR of input1 and input2. Axis of size 1 will be
+ broadcast as necessary. Rank of input tensors must match.
+
+ References:
+ * https://github.khronos.org/SPIRV-Registry/extended/TOSA.001000.1.html#_bitwise_or
+ * https://www.mlplatform.org/tosa/tosa_spec_1_0_1.html#_bitwise_or
+
+ #### Example:
+ ```mlir
+ %0 = spirv.Tosa.BitwiseOr %arg0, %arg1 : !spirv.arm.tensor<11x30x23xi32>, !spirv.arm.tensor<1x30x23xi32> -> !spirv.arm.tensor<11x30x23xi32>
+ ```
+ }];
+
+ let arguments = (ins
+ SPIRV_TosaInteger_TensorArm: $input1,
+ SPIRV_TosaInteger_TensorArm: $input2
+ );
+
+ let results = (outs
+ SPIRV_TosaInteger_TensorArm: $output
+ );
+
+ let assemblyFormat = [{
+ $input1 `,`
+ $input2
+ attr-dict `:` type(operands) `->` type(results)
+ }];
+}
+
+
+def SPIRV_TosaBitwiseXorOp : SPIRV_TosaElementwiseBinaryOp<"BitwiseXor", 18, [Pure]> {
+ let summary = "Bitwise XOR operator.";
+
+ let description = [{
+ Elementwise Bitwise XOR of input1 and input2. Axis of size 1 will be
+ broadcast as necessary. Rank of input tensors must match.
+
+ References:
+ * https://github.khronos.org/SPIRV-Registry/extended/TOSA.001000.1.html#_bitwise_xor
+ * https://www.mlplatform.org/tosa/tosa_spec_1_0_1.html#_bitwise_xor
+
+ #### Example:
+ ```mlir
+ %0 = spirv.Tosa.BitwiseXor %arg0, %arg1 : !spirv.arm.tensor<4x8x13x9xi16>, !spirv.arm.tensor<4x8x1x9xi16> -> !spirv.arm.tensor<4x8x13x9xi16>
+ ```
+ }];
+
+ let arguments = (ins
+ SPIRV_TosaInteger_TensorArm: $input1,
+ SPIRV_TosaInteger_TensorArm: $input2
+ );
+
+ let results = (outs
+ SPIRV_TosaInteger_TensorArm: $output
+ );
+
+ let assemblyFormat = [{
+ $input1 `,`
+ $input2
+ attr-dict `:` type(operands) `->` type(results)
+ }];
+}
+
+
+def SPIRV_TosaIntDivOp : SPIRV_TosaElementwiseBinaryOp<"IntDiv", 19, []> {
+ let summary = "Integer Divide operator.";
+
+ let description = [{
+ Elementwise Integer Divide of input1 by input2. Axis of size 1 will be
+ broadcast as necessary. Rank of input tensors must match. The behavior
+ is undefined if the dividend value is equal to zero.
----------------
kuhar wrote:
SPIR-V defines it as undefined https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#OpSDiv for -1 / int_min
https://github.com/llvm/llvm-project/pull/179627
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