[Mlir-commits] [mlir] [MLIR][XeGPU] Remove fold alias pass in xegpu (PR #182802)
Nishant Patel
llvmlistbot at llvm.org
Sun Feb 22 21:20:03 PST 2026
https://github.com/nbpatel created https://github.com/llvm/llvm-project/pull/182802
None
>From b3f178d81a0b4441cf6f6213dbd742d8c8e5c318 Mon Sep 17 00:00:00 2001
From: nbpatel <nishant.b.patel at intel.com>
Date: Fri, 20 Feb 2026 21:26:07 +0000
Subject: [PATCH] Remove XeGPUFoldAliasOps pass
The XeGPU fold alias ops pass is no longer needed. Remove the pass
declaration, implementation, tests, and header reference.
---
.../mlir/Dialect/XeGPU/Transforms/Passes.td | 9 ---
.../Dialect/XeGPU/Transforms/Transforms.h | 2 -
.../Dialect/XeGPU/Transforms/CMakeLists.txt | 1 -
.../XeGPU/Transforms/XeGPUFoldAliasOps.cpp | 80 -------------------
.../Dialect/XeGPU/xegpu-fold-alias-ops.mlir | 20 -----
5 files changed, 112 deletions(-)
delete mode 100644 mlir/lib/Dialect/XeGPU/Transforms/XeGPUFoldAliasOps.cpp
delete mode 100644 mlir/test/Dialect/XeGPU/xegpu-fold-alias-ops.mlir
diff --git a/mlir/include/mlir/Dialect/XeGPU/Transforms/Passes.td b/mlir/include/mlir/Dialect/XeGPU/Transforms/Passes.td
index cb71f19da62f0..6d4a568f614bd 100644
--- a/mlir/include/mlir/Dialect/XeGPU/Transforms/Passes.td
+++ b/mlir/include/mlir/Dialect/XeGPU/Transforms/Passes.td
@@ -11,15 +11,6 @@
include "mlir/Pass/PassBase.td"
-def XeGPUFoldAliasOps : Pass<"xegpu-fold-alias-ops"> {
- let summary = "Fold alias ops into XeGPU ops";
- let description = [{
- The pass folds aliasing ops into XeGPU ops that they operate on the original
- source references.
- }];
- let dependentDialects = ["memref::MemRefDialect", "xegpu::XeGPUDialect"];
-}
-
def XeGPUSubgroupDistribute : Pass<"xegpu-subgroup-distribute"> {
let summary = "Distribute XeGPU ops to work items";
let description = [{
diff --git a/mlir/include/mlir/Dialect/XeGPU/Transforms/Transforms.h b/mlir/include/mlir/Dialect/XeGPU/Transforms/Transforms.h
index fede329990be4..f9ce4d229b6cc 100644
--- a/mlir/include/mlir/Dialect/XeGPU/Transforms/Transforms.h
+++ b/mlir/include/mlir/Dialect/XeGPU/Transforms/Transforms.h
@@ -61,8 +61,6 @@ struct UnrollOptions {
}
};
-/// Appends patterns for folding aliasing ops into XeGPU ops into `patterns`.
-void populateXeGPUFoldAliasOpsPatterns(RewritePatternSet &patterns);
/// Appends patterns for optimizing block load operations into `patterns`.
void populateXeGPUPeepHoleOptimizerPatterns(RewritePatternSet &patterns);
/// Appends patterns for XeGPU SIMT distribution into `patterns`.
diff --git a/mlir/lib/Dialect/XeGPU/Transforms/CMakeLists.txt b/mlir/lib/Dialect/XeGPU/Transforms/CMakeLists.txt
index 47a3f371164fd..e4b98794d9217 100644
--- a/mlir/lib/Dialect/XeGPU/Transforms/CMakeLists.txt
+++ b/mlir/lib/Dialect/XeGPU/Transforms/CMakeLists.txt
@@ -1,6 +1,5 @@
add_mlir_dialect_library(MLIRXeGPUTransforms
XeGPUBlocking.cpp
- XeGPUFoldAliasOps.cpp
XeGPUSgToWiDistributeExperimental.cpp
XeGPUSubgroupDistribute.cpp
XeGPUUnroll.cpp
diff --git a/mlir/lib/Dialect/XeGPU/Transforms/XeGPUFoldAliasOps.cpp b/mlir/lib/Dialect/XeGPU/Transforms/XeGPUFoldAliasOps.cpp
deleted file mode 100644
index 3fccc45fecf40..0000000000000
--- a/mlir/lib/Dialect/XeGPU/Transforms/XeGPUFoldAliasOps.cpp
+++ /dev/null
@@ -1,80 +0,0 @@
-//===- XeGPUFoldAliasOps.cpp - XeGPU alias ops folders ----------*- C++ -*-===//
-//
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//
-//===----------------------------------------------------------------------===//
-
-#include "mlir/Dialect/XeGPU/Transforms/Passes.h"
-
-#include "mlir/Dialect/Affine/ViewLikeInterfaceUtils.h"
-#include "mlir/Dialect/MemRef/IR/MemRef.h"
-#include "mlir/Dialect/XeGPU/IR/XeGPU.h"
-#include "mlir/Dialect/XeGPU/Transforms/Transforms.h"
-#include "mlir/Transforms/GreedyPatternRewriteDriver.h"
-
-namespace mlir {
-namespace xegpu {
-#define GEN_PASS_DEF_XEGPUFOLDALIASOPS
-#include "mlir/Dialect/XeGPU/Transforms/Passes.h.inc"
-} // namespace xegpu
-} // namespace mlir
-
-#define DEBUG_TYPE "xegpu-fold-alias-ops"
-#define DBGS() (llvm::dbgs() << "[" DEBUG_TYPE "]: ")
-
-using namespace mlir;
-
-namespace {
-/// Merges subview operation with xegpu.create_nd_tdesc operation.
-class XegpuCreateNdDescOpSubViewOpFolder final
- : public OpRewritePattern<xegpu::CreateNdDescOp> {
-public:
- using OpRewritePattern<xegpu::CreateNdDescOp>::OpRewritePattern;
-
- LogicalResult matchAndRewrite(xegpu::CreateNdDescOp descOp,
- PatternRewriter &rewriter) const override;
-};
-} // namespace
-
-LogicalResult XegpuCreateNdDescOpSubViewOpFolder::matchAndRewrite(
- xegpu::CreateNdDescOp descOp, PatternRewriter &rewriter) const {
- auto subViewOp = descOp.getSource().getDefiningOp<memref::SubViewOp>();
-
- if (!subViewOp)
- return rewriter.notifyMatchFailure(descOp, "not a subview producer");
- if (!subViewOp.hasUnitStride())
- return rewriter.notifyMatchFailure(descOp, "requires unit strides");
-
- SmallVector<Value> resolvedOffsets;
- affine::resolveIndicesIntoOpWithOffsetsAndStrides(
- rewriter, descOp.getLoc(), subViewOp.getMixedOffsets(),
- subViewOp.getMixedStrides(), subViewOp.getDroppedDims(),
- descOp.getMixedOffsets(), resolvedOffsets);
-
- rewriter.replaceOpWithNewOp<xegpu::CreateNdDescOp>(
- descOp, descOp.getTensorDesc().getType(), subViewOp.getSource(),
- getAsOpFoldResult(resolvedOffsets));
-
- return success();
-}
-
-void xegpu::populateXeGPUFoldAliasOpsPatterns(RewritePatternSet &patterns) {
- patterns.add<XegpuCreateNdDescOpSubViewOpFolder>(patterns.getContext());
-}
-
-namespace {
-
-struct XeGPUFoldAliasOpsPass final
- : public xegpu::impl::XeGPUFoldAliasOpsBase<XeGPUFoldAliasOpsPass> {
- void runOnOperation() override;
-};
-
-} // namespace
-
-void XeGPUFoldAliasOpsPass::runOnOperation() {
- RewritePatternSet patterns(&getContext());
- xegpu::populateXeGPUFoldAliasOpsPatterns(patterns);
- (void)applyPatternsGreedily(getOperation(), std::move(patterns));
-}
diff --git a/mlir/test/Dialect/XeGPU/xegpu-fold-alias-ops.mlir b/mlir/test/Dialect/XeGPU/xegpu-fold-alias-ops.mlir
deleted file mode 100644
index d32954127fce6..0000000000000
--- a/mlir/test/Dialect/XeGPU/xegpu-fold-alias-ops.mlir
+++ /dev/null
@@ -1,20 +0,0 @@
-// RUN: mlir-opt -xegpu-fold-alias-ops -split-input-file %s | FileCheck %s
-
-func.func @fold_subview_with_xegpu_create_nd_tdesc(%arg0 : memref<256x256xf32>, %arg1 : index, %arg2 : index, %arg3 : index, %arg4 : index) ->(!xegpu.tensor_desc<8x16xf32>) {
- %subview = memref.subview %arg0[%arg1, %arg2] [32, 32] [1, 1] :
- memref<256x256xf32> to memref<32x32xf32, strided<[256, 1], offset: ?>>
- %0 = xegpu.create_nd_tdesc %subview[%arg3, %arg4] :
- memref<32x32xf32, strided<[256, 1], offset: ?>> -> !xegpu.tensor_desc<8x16xf32>
- return %0 : !xegpu.tensor_desc<8x16xf32>
-}
-
-// CHECK-DAG: #[[MAP:.+]] = affine_map<()[s0, s1] -> (s0 + s1)>
-// CHECK: func @fold_subview_with_xegpu_create_nd_tdesc
-// CHECK-SAME: %[[ARG0:[a-zA-Z0-9]+]]: memref<256x256xf32>
-// CHECK-SAME: %[[ARG1:[a-zA-Z0-9]+]]: index
-// CHECK-SAME: %[[ARG2:[a-zA-Z0-9]+]]: index
-// CHECK-SAME: %[[ARG3:[a-zA-Z0-9]+]]: index
-// CHECK-SAME: %[[ARG4:[a-zA-Z0-9]+]]: index
-// CHECK-DAG: %[[IDX0:.+]] = affine.apply #[[MAP]]()[%[[ARG1]], %[[ARG3]]]
-// CHECK-DAG: %[[IDX1:.+]] = affine.apply #[[MAP]]()[%[[ARG2]], %[[ARG4]]]
-// CHECK: xegpu.create_nd_tdesc %[[ARG0]][%[[IDX0]], %[[IDX1]]] : memref<256x256xf32> -> !xegpu.tensor_desc<8x16xf32>
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