[Mlir-commits] [mlir] [mlir][PDL] Set debug name on PDL patterns (PR #182661)

[llvmlistbot at llvm.org]

llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-mlir

Author: Sam.Nour (SamNour)

<details>
<summary>Changes</summary>

Before, `PDLByteCodePattern` did not have its debug name set, making PDL patterns anonymous in debug logs.

---
Full diff: https://github.com/llvm/llvm-project/pull/182661.diff


2 Files Affected:

- (modified) mlir/lib/Rewrite/ByteCode.cpp (+12-6) 
- (modified) mlir/test/Conversion/PDLToPDLInterp/pdl-to-pdl-interp-rewriter.mlir (+27) 


``````````diff
diff --git a/mlir/lib/Rewrite/ByteCode.cpp b/mlir/lib/Rewrite/ByteCode.cpp
index cf00216288115..1f5795a74d298 100644
--- a/mlir/lib/Rewrite/ByteCode.cpp
+++ b/mlir/lib/Rewrite/ByteCode.cpp
@@ -42,18 +42,24 @@ PDLByteCodePattern PDLByteCodePattern::create(pdl_interp::RecordMatchOp matchOp,
   PatternBenefit benefit = matchOp.getBenefit();
   MLIRContext *ctx = matchOp.getContext();
 
+  StringRef debugName = matchOp.getRewriter().getLeafReference().getValue();
   // Collect the set of generated operations.
   SmallVector<StringRef, 8> generatedOps;
   if (ArrayAttr generatedOpsAttr = matchOp.getGeneratedOpsAttr())
     generatedOps =
         llvm::to_vector<8>(generatedOpsAttr.getAsValueRange<StringAttr>());
 
-  // Check to see if this is pattern matches a specific operation type.
-  if (std::optional<StringRef> rootKind = matchOp.getRootKind())
-    return PDLByteCodePattern(rewriterAddr, configSet, *rootKind, benefit, ctx,
-                              generatedOps);
-  return PDLByteCodePattern(rewriterAddr, configSet, MatchAnyOpTypeTag(),
-                            benefit, ctx, generatedOps);
+  // Check to see if this pattern matches a specific operation type.
+  std::optional<StringRef> rootKind = matchOp.getRootKind();
+  PDLByteCodePattern pattern =
+      rootKind
+          ? PDLByteCodePattern(rewriterAddr, configSet, *rootKind, benefit, ctx,
+                               generatedOps)
+          : PDLByteCodePattern(rewriterAddr, configSet, MatchAnyOpTypeTag(),
+                               benefit, ctx, generatedOps);
+
+  pattern.setDebugName(debugName);
+  return pattern;
 }
 
 //===----------------------------------------------------------------------===//
diff --git a/mlir/test/Conversion/PDLToPDLInterp/pdl-to-pdl-interp-rewriter.mlir b/mlir/test/Conversion/PDLToPDLInterp/pdl-to-pdl-interp-rewriter.mlir
index cf0cefd3280a8..db8abb7f74647 100644
--- a/mlir/test/Conversion/PDLToPDLInterp/pdl-to-pdl-interp-rewriter.mlir
+++ b/mlir/test/Conversion/PDLToPDLInterp/pdl-to-pdl-interp-rewriter.mlir
@@ -287,3 +287,30 @@ module @named_pattern {
     rewrite %root with "rewriter"
   }
 }
+
+// -----
+
+// CHECK-LABEL: module @named_pattern
+module @named_pattern {
+  // CHECK: pdl_interp.func @matcher(%[[ARG0:.*]]: !pdl.operation) {
+  // CHECK:   pdl_interp.check_operation_name of %[[ARG0]] is "foo.op" -> ^bb2, ^bb1
+  // CHECK: ^bb1:
+  // CHECK:   pdl_interp.finalize
+  // CHECK: ^bb2:
+  // CHECK:   pdl_interp.check_operand_count of %[[ARG0]] is 0 -> ^bb3, ^bb1
+  // CHECK: ^bb3:
+  // CHECK:   pdl_interp.check_result_count of %[[ARG0]] is 0 -> ^bb4, ^bb1
+  // CHECK: ^bb4:
+  // CHECK:   pdl_interp.record_match @rewriters::@my_pattern(%[[ARG0]] : !pdl.operation) : benefit(1), loc([%[[ARG0]]]), root("foo.op") -> ^bb1
+  // CHECK: }
+  // CHECK: module @rewriters {
+  // CHECK:   pdl_interp.func @my_pattern(%[[ARG0:.*]]: !pdl.operation) {
+  // CHECK:     pdl_interp.apply_rewrite "rewriter"(%[[ARG0]] : !pdl.operation)
+  // CHECK:     pdl_interp.finalize
+  // CHECK:   }
+  // CHECK: }
+  pdl.pattern @my_pattern : benefit(1) {
+    %root = operation "foo.op"
+    rewrite %root with "rewriter"
+  }
+}
\ No newline at end of file

``````````

</details>


https://github.com/llvm/llvm-project/pull/182661