[Mlir-commits] [mlir] [mlir][rocdl] Add IR examples to OP definitions (PR #182147)
Krzysztof Drewniak
llvmlistbot at llvm.org
Wed Feb 18 17:13:14 PST 2026
================
@@ -389,20 +458,57 @@ def ROCDL_GridDimZOp : ROCDL_DimGetterFunctionOp<"grid.dim.z",
def ROCDL_SWaitcntOp : ROCDL_ConcreteNonMemIntrOp<"s.waitcnt", [], 0, [0], ["bitfield"]>,
Arguments<(ins I32Attr:$bitfield)> {
let assemblyFormat = "attr-dict $bitfield";
+ let description = [{
+ Wait for outstanding memory operations to complete, as specified by a
+ bitfield whose semantics depend on the target chipset.
+
+ Example:
+ ```mlir
+ // Wait for all counters to reach zero.
+ rocdl.s.waitcnt 0
+ ```
+ }];
}
def ROCDL_SSleepOp : ROCDL_ConcreteNonMemIntrOp<"s.sleep", [], 0, [0], ["count"]>,
Arguments<(ins I32Attr:$count)> {
let assemblyFormat = "attr-dict $count";
+ let description = [{
+ Sleep for a number of clock cycles.
+
+ Example:
+ ```mlir
+ // Sleep for a minimum duration.
+ rocdl.s.sleep 0
+ ```
+ }];
}
def ROCDL_SNopOp : ROCDL_ConcreteNonMemIntrOp<"s.nop", [], 0, [0], ["count"]>,
Arguments<(ins I16Attr:$count)> {
let assemblyFormat = "attr-dict $count";
+ let description = [{
+ Insert a number of NOP cycles.
+
+ Example:
+ ```mlir
+ // Insert a no-op.
+ rocdl.s.nop 0
+ ```
+ }];
}
def ROCDL_SBarrierOp : ROCDL_ConcreteNonMemIntrOp<"s.barrier", [], 0> {
let assemblyFormat = "attr-dict";
+ let description = [{
+ Insert a workgroup barrier without memory fences.
----------------
krzysz00 wrote:
Available on gfx9 and later but deprecated on gfx12 - see s.barrier.signal and s.barrier.wait
https://github.com/llvm/llvm-project/pull/182147
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