[Mlir-commits] [mlir] [MLIR][NVVM] Enable result type inference (PR #181781)

Srinivasa Ravi llvmlistbot at llvm.org
Mon Feb 16 23:11:23 PST 2026


https://github.com/Wolfram70 created https://github.com/llvm/llvm-project/pull/181781

This change includes `InferOpTypeInterface.td` in `NVVMOps.td` enabling result type inference for NVVM operations. This also fixes a python test for `nvvm.redux.sync` in `nvvm.py` due to a change in the python binding after enabling result type inference.

>From 35e649b821ee2c41f4836629738c076a1e8f7f3f Mon Sep 17 00:00:00 2001
From: Srinivasa Ravi <srinivasar at nvidia.com>
Date: Tue, 17 Feb 2026 07:00:02 +0000
Subject: [PATCH] [MLIR][NVVM] Enable result type inference

This change includes `InferOpTypeInterface.td` in `NVVMOps.td`
enabling result type inference for NVVM operations. This also fixes a
python test for `nvvm.redux.sync` in `nvvm.py` due to a change in
the python binding after enabling result type inference.
---
 mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td | 1 +
 mlir/test/python/dialects/nvvm.py           | 4 ++--
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td b/mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
index 5cd4a1af1f881..b38b51a7794ba 100644
--- a/mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
+++ b/mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
@@ -21,6 +21,7 @@ include "mlir/Dialect/Ptr/IR/MemorySpaceInterfaces.td"
 include "mlir/Interfaces/SideEffectInterfaces.td"
 include "mlir/Dialect/LLVMIR/BasicPtxBuilderInterface.td"
 include "mlir/Interfaces/InferIntRangeInterface.td"
+include "mlir/Interfaces/InferTypeOpInterface.td"
 include "mlir/Dialect/LLVMIR/LLVMTypes.td"
 include "mlir/IR/CommonAttrConstraints.td"
 
diff --git a/mlir/test/python/dialects/nvvm.py b/mlir/test/python/dialects/nvvm.py
index 62236c31e5fdc..f3af2007ac9c1 100644
--- a/mlir/test/python/dialects/nvvm.py
+++ b/mlir/test/python/dialects/nvvm.py
@@ -172,13 +172,13 @@ def reductions(mask, vi32, vf32):
                     nvvm.ReductionKind.UMIN,
                     nvvm.ReductionKind.XOR,
                 ):
-                    nvvm.redux_sync(i32, vi32, kind, vi32)
+                    nvvm.redux_sync(vi32, kind, vi32)
 
                 for kind in (
                     nvvm.ReductionKind.FMIN,
                     nvvm.ReductionKind.FMAX,
                 ):
-                    nvvm.redux_sync(f32, vf32, kind, vi32, abs=abs, nan=nan)
+                    nvvm.redux_sync(vf32, kind, vi32, abs=abs, nan=nan)
 
 
 # CHECK-LABEL:   func.func @reductions(



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