[Mlir-commits] [mlir] [mlir][x86vector] Shuffle BF16 vector.contract output for Flat layout. (PR #174590)

[Arun Thangamani]

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@@ -62,11 +63,13 @@ static bool validateVectorContractOperands(Value prodOp) {
   // Return false if the two innermost strides of the memref are not contiguous.
   // The x86vector.avx.cvt.packed.even/odd.indexed_to_f32 operations require
   // an eight-element tuple of bf16 values to be contiguous.
-  if (!llvm::cast<mlir::MemRefType>(srcType).areTrailingDimsContiguous(2))
+  int dimsToCheck = isVnni ? 2 : 1;
+  if (!llvm::cast<mlir::MemRefType>(srcType).areTrailingDimsContiguous(
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arun-thmn wrote:

Thanks, skipped.

https://github.com/llvm/llvm-project/pull/174590