[Mlir-commits] [mlir] 7171d6c - [mlir][spirv] Update op examples that diverged from assemblyFormat. NFC. (#179594)
llvmlistbot at llvm.org
llvmlistbot at llvm.org
Wed Feb 4 03:35:19 PST 2026
Author: Jakub Kuderski
Date: 2026-02-04T06:35:14-05:00
New Revision: 7171d6c73bbe791d931632dba27f322edf25fe28
URL: https://github.com/llvm/llvm-project/commit/7171d6c73bbe791d931632dba27f322edf25fe28
DIFF: https://github.com/llvm/llvm-project/commit/7171d6c73bbe791d931632dba27f322edf25fe28.diff
LOG: [mlir][spirv] Update op examples that diverged from assemblyFormat. NFC. (#179594)
Added:
Modified:
mlir/include/mlir/Dialect/SPIRV/IR/SPIRVArithmeticOps.td
mlir/include/mlir/Dialect/SPIRV/IR/SPIRVAtomicOps.td
mlir/include/mlir/Dialect/SPIRV/IR/SPIRVCastOps.td
mlir/include/mlir/Dialect/SPIRV/IR/SPIRVCompositeOps.td
mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGroupOps.td
mlir/include/mlir/Dialect/SPIRV/IR/SPIRVNonUniformOps.td
mlir/include/mlir/Dialect/SPIRV/IR/SPIRVStructureOps.td
Removed:
################################################################################
diff --git a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVArithmeticOps.td b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVArithmeticOps.td
index 65771b602e0d0..e07b1ffd92f07 100644
--- a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVArithmeticOps.td
+++ b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVArithmeticOps.td
@@ -238,8 +238,8 @@ def SPIRV_FRemOp : SPIRV_ArithmeticBinaryOp<"FRem", SPIRV_Float, []> {
#### Example:
```mlir
- %4 = spirv.FRemOp %0, %1 : f32
- %5 = spirv.FRemOp %2, %3 : vector<4xf32>
+ %4 = spirv.FRem %0, %1 : f32
+ %5 = spirv.FRem %2, %3 : vector<4xf32>
```
}];
}
@@ -260,8 +260,8 @@ def SPIRV_FSubOp : SPIRV_ArithmeticBinaryOpWithCoopMatrix<"FSub", SPIRV_Float, [
#### Example:
```mlir
- %4 = spirv.FRemOp %0, %1 : f32
- %5 = spirv.FRemOp %2, %3 : vector<4xf32>
+ %4 = spirv.FSub %0, %1 : f32
+ %5 = spirv.FSub %2, %3 : vector<4xf32>
```
}];
}
diff --git a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVAtomicOps.td b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVAtomicOps.td
index 88f902110b861..202fa0ad60d2f 100644
--- a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVAtomicOps.td
+++ b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVAtomicOps.td
@@ -443,8 +443,8 @@ def SPIRV_AtomicIIncrementOp : SPIRV_AtomicUpdateOp<"AtomicIIncrement", []> {
#### Example:
```mlir
- %0 = spirv.AtomicIncrement <Device> <None> %pointer :
- !spirv.ptr<i32, StorageBuffer>
+ %0 = spirv.AtomicIIncrement <Device> <None> %pointer :
+ !spirv.ptr<i32, StorageBuffer>
```
}];
}
diff --git a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVCastOps.td b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVCastOps.td
index a5c8aa8fb450c..f05030dfb5d57 100644
--- a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVCastOps.td
+++ b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVCastOps.td
@@ -212,8 +212,8 @@ def SPIRV_FConvertOp : SPIRV_CastOp<"FConvert",
#### Example:
```mlir
- %1 = spirv.FConvertOp %0 : f32 to f64
- %3 = spirv.FConvertOp %2 : vector<3xf32> to vector<3xf64>
+ %1 = spirv.FConvert %0 : f32 to f64
+ %3 = spirv.FConvert %2 : vector<3xf32> to vector<3xf64>
```
}];
}
@@ -240,8 +240,8 @@ def SPIRV_SConvertOp : SPIRV_CastOp<"SConvert",
#### Example:
```mlir
- %1 = spirv.SConvertOp %0 : i32 to i64
- %3 = spirv.SConvertOp %2 : vector<3xi32> to vector<3xi64>
+ %1 = spirv.SConvert %0 : i32 to i64
+ %3 = spirv.SConvert %2 : vector<3xi32> to vector<3xi64>
```
}];
}
@@ -269,8 +269,8 @@ def SPIRV_UConvertOp : SPIRV_CastOp<"UConvert",
#### Example:
```mlir
- %1 = spirv.UConvertOp %0 : i32 to i64
- %3 = spirv.UConvertOp %2 : vector<3xi32> to vector<3xi64>
+ %1 = spirv.UConvert %0 : i32 to i64
+ %3 = spirv.UConvert %2 : vector<3xi32> to vector<3xi64>
```
}];
}
@@ -390,7 +390,7 @@ def SPIRV_PtrCastToGenericOp : SPIRV_Op<"PtrCastToGeneric", [Pure]> {
#### Example:
```mlir
- %1 = spirv.PtrCastToGenericOp %0 : !spirv.ptr<f32, CrossWorkGroup> to
+ %1 = spirv.PtrCastToGeneric %0 : !spirv.ptr<f32, CrossWorkgroup> to
!spirv.ptr<f32, Generic>
```
}];
@@ -433,8 +433,8 @@ def SPIRV_GenericCastToPtrOp : SPIRV_Op<"GenericCastToPtr", [Pure]> {
#### Example:
```mlir
- %1 = spirv.GenericCastToPtrOp %0 : !spirv.ptr<f32, Generic> to
- !spirv.ptr<f32, CrossWorkGroup>
+ %1 = spirv.GenericCastToPtr %0 : !spirv.ptr<f32, Generic> to
+ !spirv.ptr<f32, CrossWorkgroup>
```
}];
@@ -482,8 +482,8 @@ def SPIRV_GenericCastToPtrExplicitOp : SPIRV_Op<"GenericCastToPtrExplicit", [Pur
#### Example:
```mlir
- %1 = spirv.GenericCastToPtrExplicitOp %0 : !spirv.ptr<f32, Generic> to
- !spirv.ptr<f32, CrossWorkGroup>
+ %1 = spirv.GenericCastToPtrExplicit %0 : !spirv.ptr<f32, Generic> to
+ !spirv.ptr<f32, CrossWorkgroup>
```
}];
diff --git a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVCompositeOps.td b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVCompositeOps.td
index 269db1b61c7ad..981131484498d 100644
--- a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVCompositeOps.td
+++ b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVCompositeOps.td
@@ -255,7 +255,7 @@ def SPIRV_VectorInsertDynamicOp : SPIRV_Op<"VectorInsertDynamic", [
```mlir
%scalar = ... : f32
- %2 = spirv.VectorInsertDynamic %scalar %0[%1] : f32, vector<8xf32>, i32
+ %2 = spirv.VectorInsertDynamic %scalar, %0[%1] : vector<8xf32>, i32
```
}];
diff --git a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGroupOps.td b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGroupOps.td
index a8743b196bfe7..400e37432f388 100644
--- a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGroupOps.td
+++ b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGroupOps.td
@@ -104,8 +104,8 @@ def SPIRV_GroupBroadcastOp : SPIRV_Op<"GroupBroadcast",
%vector_value = ... : vector<4xf32>
%scalar_localid = ... : i32
%vector_localid = ... : vector<3xi32>
- %0 = spirv.GroupBroadcast "Subgroup" %scalar_value, %scalar_localid : f32, i32
- %1 = spirv.GroupBroadcast "Workgroup" %vector_value, %vector_localid :
+ %0 = spirv.GroupBroadcast <Subgroup> %scalar_value, %scalar_localid : f32, i32
+ %1 = spirv.GroupBroadcast <Workgroup> %vector_value, %vector_localid :
vector<4xf32>, vector<3xi32>
```
}];
diff --git a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVNonUniformOps.td b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVNonUniformOps.td
index 37df66372f51c..784eb40141b74 100644
--- a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVNonUniformOps.td
+++ b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVNonUniformOps.td
@@ -239,8 +239,8 @@ def SPIRV_GroupNonUniformBroadcastOp : SPIRV_Op<"GroupNonUniformBroadcast",
%scalar_value = ... : f32
%vector_value = ... : vector<4xf32>
%id = ... : i32
- %0 = spirv.GroupNonUniformBroadcast "Subgroup" %scalar_value, %id : f32, i32
- %1 = spirv.GroupNonUniformBroadcast "Workgroup" %vector_value, %id :
+ %0 = spirv.GroupNonUniformBroadcast <Subgroup> %scalar_value, %id : f32, i32
+ %1 = spirv.GroupNonUniformBroadcast <Workgroup> %vector_value, %id :
vector<4xf32>, i32
```
}];
@@ -283,7 +283,7 @@ def SPIRV_GroupNonUniformElectOp : SPIRV_Op<"GroupNonUniformElect", []> {
#### Example:
```mlir
- %0 = spirv.GroupNonUniformElect : i1
+ %0 = spirv.GroupNonUniformElect <Workgroup> : i1
```
}];
@@ -1406,7 +1406,7 @@ def SPIRV_GroupNonUniformRotateKHROp : SPIRV_Op<"GroupNonUniformRotateKHR", [
%four = spirv.Constant 4 : i32
%0 = spirv.GroupNonUniformRotateKHR <Subgroup> %value, %delta : f32, i32 -> f32
%1 = spirv.GroupNonUniformRotateKHR <Workgroup> %value, %delta,
- clustersize(%four) : f32, i32, i32 -> f32
+ cluster_size(%four) : f32, i32, i32 -> f32
```
}];
@@ -1462,7 +1462,7 @@ def SPIRV_GroupNonUniformAllOp : SPIRV_Op<"GroupNonUniformAll", [
```mlir
%predicate = ... : i1
- %0 = spirv.GroupNonUniformAll "Subgroup" %predicate : i1
+ %0 = spirv.GroupNonUniformAll <Subgroup> %predicate : i1
```
}];
@@ -1518,7 +1518,7 @@ def SPIRV_GroupNonUniformAnyOp : SPIRV_Op<"GroupNonUniformAny", [
```mlir
%predicate = ... : i1
- %0 = spirv.GroupNonUniformAny "Subgroup" %predicate : i1
+ %0 = spirv.GroupNonUniformAny <Subgroup> %predicate : i1
```
}];
diff --git a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVStructureOps.td b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVStructureOps.td
index 82d3ce1dcaeb4..9959f0bec781e 100644
--- a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVStructureOps.td
+++ b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVStructureOps.td
@@ -437,7 +437,7 @@ def SPIRV_GlobalVariableOp : SPIRV_Op<"GlobalVariable", [InModuleScope, Symbol]>
#### Example:
```mlir
- spirv.GlobalVariable @var0 : !spirv.ptr<f32, Input> @var0
+ spirv.GlobalVariable @var0 : !spirv.ptr<f32, Input>
spirv.GlobalVariable @var1 initializer(@var0) : !spirv.ptr<f32, Output>
spirv.GlobalVariable @var2 bind(1, 2) : !spirv.ptr<f32, Uniform>
spirv.GlobalVariable @var3 built_in("GlobalInvocationId") : !spirv.ptr<vector<3xi32>, Input>
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