[Mlir-commits] [mlir] [mlir] Implement indexed access op interfaces for memref, vector, gpu, nvgpu (PR #177014)
Krzysztof Drewniak
llvmlistbot at llvm.org
Tue Feb 3 22:47:20 PST 2026
================
@@ -2103,6 +2111,14 @@ def Vector_GatherOp :
memory at an address aligned to this boundary. Violating this requirement
triggers immediate undefined behavior.
+ Note that if the base argument is not contiguous in memory (for example,
+ it is the result of a `tensor.extract` or a `memref.subview`), the entries
+ of `index_vec` must respect the strieds in the underlying memory and are
+ applied as pure 1-D offsets and are not decomposed in order to apply
+ the strides on the base.
----------------
krzysz00 wrote:
Yeah - there's enough weirdness that it's unclear when you can fold a subview into a vector.gather and if that requires any special handling post-fold
I think we'd want to do a semi-breaking change where you're passing in, say, a `vector<... x D x index>` to get a vector<...> result, where D is some number of dimensions on the memref <= its rank (so that you can pass in 2-tuples of indices or so on to get 2D indexing) - and we could probably rig the semantics such that if you leave off that trailing D dimension we assume D = 1. That'd mean that the gather index always gets added to the last dimension of the memref.
>From there, we could handle non-unit strides in the lowering to LLVM fine, and in FoldMemRefAliasOps we'd just not fold in subviews etc. that would mess with the stride of the final dimension - which is already the sort of thing the interface accounts for.
But that's future work and we can deal with it in a different PR. For this one I can drop the implementations.
https://github.com/llvm/llvm-project/pull/177014
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