[Mlir-commits] [mlir] [MLIR][NVVM] Add nvvm.fadd and nvvm.fsub Ops (PR #179162)

[Guray Ozen]

================
@@ -6247,6 +6176,80 @@ def NVVM_Tcgen05MMAWsSparseOp : NVVM_Op<"tcgen05.mma.ws.sp",
   }];
 }
 
+def NVVMFloatType : AnyTypeOf<[F16, BF16, F32, F64, VectorOfLengthAndType<[2], [F16, BF16]>]>;
----------------
grypp wrote:

It's nice to use alias, but we have also other exotic floating types :) Maybe let's rename it like 
`NVVMFloatType` -> `SIMTFloatType` or something that tells we can do ALU computation 

https://github.com/llvm/llvm-project/pull/179162